System and method for delaying indirect register offset resolution
AssigneeSega of America, Inc.
InventorToshiyasu Morita
Life of this patent
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Abstract
A system and method for delaying indirect register offset resolution including a processor having a plurality of registers, a memory storing program instructions, and a compiler for translating the program instructions into executable object code for execution by the processor. In addition, the invention includes a set of offset register lists for storing offset values generated by the compiler.
Claims23
A method for delaying register offset resolution, comprising the steps of:
- examining a program instruction;
- generating an entry in an offset register list, the entry including an indirect-address offset value corresponding to the examined program instruction;
- determining if entries in the offset register list exceed an indirect-address offset value range;
- and
- if the indirect-address offset value range is exceeded, resolving indirect-address offset values entered in the offset register list and outputting low-level program code corresponding to the offset register list.
A system for delaying register offset resolution, comprising:
- program code stored in a memory, the program code comprising a set of program instructions;
- a set of offset register lists stored in the memory, each one of the set of offset register lists corresponding to a single register;
- and
- a compiler for examining the program instructions and entering offset values contained in the program instructions into selected ones of the set of offset register lists.
A computer-readable medium comprising program instructions for delaying register offset resolution, by performing the steps of:
- examining a program instruction;
- generating an entry in an offset register list, the entry including an indirect offset value corresponding to the examined program instruction;
- determining whether an indirect-address offset range is exceeded in the offset register list;
- and
- if the offset range is exceeded, resolving indirect offset values entered in the offset register list and outputting low-level program code corresponding to the offset register list.
A system for delaying register offset resolution, comprising:
- means for examining a program instruction;
- means for generating an entry in an offset register list, the entry including an indirect offset value corresponding to the examined program instruction;
- means for determining whether an indirect-address offset range is exceeded in the offset register list;
- and
- means for resolving indirect offset values entered in the offset register list and for outputting low-level program code corresponding to the offset register list if the offset range is exceeded.
Dependencies are inferred from the claim text.