Method and device enabling a fixed program to be developed

A process for writing a new code sequence in a device comprising a processing means for executing code instructions, a non-programmable memory means and a programmable memory means, wherein said non-programmable memory means contains a code including a plurality of instructions and at least one code sequence reference, and said programmable memory means contains an orientation table comprising a field for storing at least one code sequence reference linked with a code sequence, wherein said linkage enables a code jump from said code to said code sequence, said code sequence being stored in one of said non-programmable memory means and programmable memory means, the process comprising the steps of

• receiving a write command,
• verifying the presence in the write command of a first field constituting the code reference and a second field representing the address of the code sequence in the non-programmable memory means;
• verifying that a predetermined flag is active;
• checking that the code sequence reference supplied by the first field does not exist in the orientation table;
• setting the flag to an active state;
• receiving and writing in the non-programmable memory means information associated with the new code sequence, including updating said orientation table;
• setting the flag to the inactive state;
• and
• stopping the process when said flag is inactive or the code sequence reference exists in the orientation table before writing.

A method for storing a code comprising a plurality of instructions to be executed in a device comprising a processor for executing instructions, a non-programmable memory for storing information, and a programmable memory for storing information, the method comprising the steps of:

• inserting at specific locations among said instructions of said code at least one code sequence reference able to provide access to a code sequence comprising at least one instruction to be executed and which is arranged to be executed by said processor at a respective one of said specific locations in addition to said code, said code sequence being stored in one of said non-programmable memory and said programmable memory;
• storing said code including said at least one code sequence reference in said non-programmable memory;
• defining in said programmable memory a zone of variable size dedicated for storing at least one of said code sequence references;
• storing in said zone only those code sequence references of said locations where access to code sequences is required;
• and
• adapting the size of said zone to the number of code sequence references stored therein,
• so that said processor, when executing said code and encountering a code sequence reference at one of said locations, will search for said code sequence reference in said zone and, if found, will execute a jump from said code to said code sequence for executing the instructions of said code sequence, and then will execute remaining instructions of said code.