Apparatus and method to reduce node toggling in semiconductor devices
AssigneeInternational Business Machines Corporation
InventorsAlvar A. Dean, Kenneth J. Goodnow, Sebastian T. Ventrone
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Abstract
According to the preferred embodiment, a device and method for reducing power consumption by reducing unneeded node toggling is provided. The preferred embodiment reduces unneeded toggling that commonly occurs in many types of logic circuits. The preferred embodiment reduces unneeded node toggling in a circuit by holding a portion of the device at the previous output until the all the inputs have stabilized to their final value during each clock cycle. This reduces power consumption in the device that would normally occur due to unnecessary node toggling.
Claims10
A method for designing a device comprising a plurality of circuits to reduce power consumption, the method comprising the steps of:
- a) selecting at least one circuit from said plurality of circuits to replace with at least one minimum toggle circuit;
- b) determining time needed for each input of the at least one minimum circuit toggle circuit to stabilize each clock cycle;
- and
- c) providing an enable signaler to disable corresponding output(s) of the at least one minimum toggle circuit each clock cycle and enable corresponding output(s) of the at least one minimum toggle circuit after the determined time needed for all of a plurality of inputs to said minimum toggle circuit have stabilized during each clock cycle.
Dependencies are inferred from the claim text.