Low latency data path in a cross-bar switch providing dynamically prioritized bus arbitration

A cross-bar switch comprising:

• a plurality of master bus ports, the master bus ports adapted to receive a plurality of master buses;
• a plurality of slave bus ports, the slave bus ports adapted to receive a plurality of slave buses;
• a switching means for selectively coupling the plurality of master bus ports to the plurality of slave bus ports;
• and
• configuration means for prioritizing and arbitrating access requests by the plurality of master buses to the plurality of slave buses via the switching means, wherein the configuration means comprises Configuration Registers, wherein the Configuration Registers comprise:
• at least one Priority Control Bit;
• a Transfer Abort Control Bit, wherein the Transfer Abort Control Bit enables the abort of a lower-priority burst-type access which may be in progress on a slave bus when a higher priority master bus initiates an access request to the same slave bus to minimize cycle latency of high priority requests;
• and
• a Secondary Transfer Request Enable.

A cross-bar switch comprising:

• a plurality of master bus ports, the master bus ports adapted to receive a plurality of master buses;
• a plurality of slave bus ports, the slave bus ports adapted to receive a plurality of slave buses;
• a switching means for selectively coupling the plurality of master bus ports to the plurality of slave bus ports;
• and
• configuration means for prioritizing and arbitrating access requests by the plurality of master buses to the plurality of slave buses via the switching means, wherein the configuration means comprises Configuration Registers, wherein the Configuration Registers comprise:
• at least one Priority Control Bit;
• a Transfer Abort Control Bit;
• and
• a Secondary Transfer Request Enable, wherein the Secondary Transfer Request Enable enables or disables the servicing of a lower-priority address-pipelined access request by a slave bus not currently servicing a higher-priority access request.

A cross-bar switch comprising:

• a plurality of master bus ports, the master bus ports adapted to receive a plurality of master buses;
• a plurality of slave bus ports, the slave bus ports adapted to receive a plurality of slave buses;
• a switching means for selectively coupling the plurality of master bus ports to the plurality of slave bus ports;
• and
• configuration registers for prioritizing data transfer requests by the plurality of master buses to the plurality of slave buses via the switching means, the configuration registers comprising:
• at least one Priority Control Bit,
• a Transfer Abort Control Bit, wherein the Transfer Abort Control Bit enables the abort of a lower-priority burst-type data transfer which may be in progress on a slave bus when a master bus initiates a higher-priority data transfer request to the same slave bus, and
• a Secondary Transfer Request Enable.

A cross-bar switch comprising:

• a plurality of master bus ports, the master bus ports adapted to receive a plurality of master buses;
• a plurality of slave bus ports, the slave bus ports adapted to receive a plurality of slave buses;
• a switching means for selectively coupling the plurality of master bus ports to the plurality of slave bus ports;
• and
• configuration registers for prioritizing data transfer requests by the plurality of master buses to the plurality of slave buses via the switching means, the configuration registers comprising:
• at least one Priority Control Bit,
• a Transfer Abort Control Bit, and
• a Secondary Transfer Request Enable, wherein the Secondary Transfer Request Enable enables or disables the servicing of a lower-priority address-pipelined data transfer request by a slave bus not currently servicing a higher-priority data transfer request.

A system for providing a cross-bar switch comprising:

• means for providing a plurality of master bus ports, the master bus ports adapted to receive a plurality of master buses;
• means for providing a plurality of slave bus ports, the slave bus ports adapted to receive a plurality of slave buses;
• a switching means for selectively coupling the plurality of master bus ports to the plurality of slave bus ports;
• and
• configuration means for prioritizing access requests by the plurality of master buses to the plurality of slave buses via the switching means, wherein the configuration means comprises Configuration Registers, wherein the Configuration Registers comprise:
• at least one Priority Control Bit;
• a Transfer Abort Control Bit, wherein the Transfer Abort Control Bit enables the abort of a lower-priority burst-type access which may be in progress on a slave bus when a higher priority master bus initiates an access request to the same slave bus;
• and
• a Secondary Transfer Request Enable.

A system for providing a cross-bar switch comprising:

• means for providing a plurality of master bus ports, the master bus ports adapted to receive a plurality of master buses;
• means for providing a plurality of slave bus ports, the slave bus ports adapted to receive a plurality of slave buses;
• a switching means for selectively coupling the plurality of master bus ports to the plurality of slave bus ports;
• and
• configuration means for prioritizing access requests by the plurality of master buses to the plurality of slave buses via the switching means, wherein the configuration means comprises Configuration Registers, wherein the Configuration Registers comprise:
• at least one Priority Control Bit;
• a Transfer Abort Control Bit;
• and
• a Secondary Transfer Request Enable, wherein the Secondary Transfer Request Enable enables or disables the servicing of a lower-priority address-pipelined access request by a slave bus not currently servicing a higher-priority access request.