Microprocessor-based serial bus interface arrangement and method
AssigneePhilips Semiconductor, Inc.
InventorPaul S. Levy
Life of this patent
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Abstract
A microprocessor-based serial bus interface circuit arrangement. The interface circuit arrangement includes a processor, a read-only memory circuit, a random access memory circuit, and a port interface circuit arrangement coupled to a local bus. The processor is configured and arranged to perform selected link layer functions of the IEEE 1394 standard. The read-only memory is configured with instructions for causing the processor to perform the selected link layer functions, and the random access memory is utilized by the link layer software. The port interface circuit arrangement is arranged to couple to the 1394 standard serial bus and transfer data between random access memory and the 1394 bus via the local bus responsive to the processor performing the selected link layer functions.
Claims16
An interface circuit arrangement for coupling a host processor to an IEEE 1394 standard serial bus, comprising:
- a local bus;
- a processor coupled to the bus and configured and arranged to perform selected link layer functions of the IEEE 1394 standard;
- a read-only memory circuit coupled to the local bus and configured with instructions that cause the processor to perform the selected link layer functions;
- a random access memory circuit coupled to the bus and arranged for storage of data manipulated by the link layer functions;
- and
- a 1394 port interface circuit arrangement coupled to the bus and arranged to couple to the 1394 standard serial bus and transfer data between the random access memory and the 1394 bus via the local bus responsive to the processor performing the selected link layer functions.
Dependencies are inferred from the claim text.