Electronic apparatus with version-up information having address information storing in EEPROM
AssigneeCanon Kabushiki Kaisha
InventorMasanori Yamada
Life of this patent
Estimating the term…
Abstract
A memory card stores programs and constant data for both a master CPU and a slave CPU. The master CPU identifies a header portion of the memory card attached to a card adapter to identify the storage locations of the data for the master CPU and the slave CPU, the size thereof and the addresses in RAMs at which the data for the master CPU and that for the slave CPU are stored. The master CPU writes the data for the master CPU in the RAM while it serially transfers the data for the slave CPU to the slave CPU and writes it in the RAM for the slave CPU. The individual CPUs perform control of loads according to the data in the RAMs.
Claims20
An apparatus having a plurality of microcomputers, and in which a load and a ROM for storing control information for controlling said load are provided for each of said microcomputers, wherein, in said apparatus, each said ROM is an electrically erasable and programmable ROM, and wherein said apparatus comprises:
- an input unit adapted to input version-up information, which includes rewrite information to be stored in said ROM and address information specifying an area to which the rewrite information is to be rewritten, for making the version-up of the control information;
- a judgment unit adapted to judge one of said plurality of the ROMs corresponding to the input version-up information when the version-up information is input by said input unit;
- and
- a rewrite unit adapted to rewrite the rewrite information of said input version-up information into the area, which is specified by said address information of said input version-up information, of said ROM judged by said judgment unit.
An apparatus having a plurality of microcomputers, and in which a load and an EEPROM for storing control information for controlling said load are provided for each of said microcomputers, said apparatus comprising:
- an input unit adapted to input version-up information, which includes rewrite information to be stored in said EEPROM and address information specifying an area to which the rewrite information is to be written, for making the version-up of the control information;
- a judgment unit adapted to judge one of said plurality of the EEPROMs corresponding to the input version-up information when the version-up information is input by said input unit;
- and
- a rewrite unit adapted to rewrite the rewrite information of said input version-up information into the area, which is specified by said address information of said input version-up information, of said EEPROM judged by said judgment unit.
Dependencies are inferred from the claim text.