US 6,275,839 B1 · Method and system for immediate exponent normalization in a fast floating point adder

Abstract

A method and system for use in a data processing system is proposed, wherein the Input Exponent is used already in the subblocks of the mantissa addition. Early in the flow of a cycle, there are parts of the Potential exponent result generated and put together using zero detect signals and carry select signals of the Carry Select Adder of the mantissa addition. For the addition of two floating point numbers this reduces the number of required logic gates in the timing critical path. This allows a faster cycle time and/or less latency and/or more complex functions. The method and system according to the invention can be applied to adders of different mantissa widths or different exponent widths as well as power of radix 2.

Claims8

Dependent claims

A method for calculating a floating point addition in a data processing system, said method comprising the steps of:

aligning a plurality of mantissas and generating an Input Exponent for calculation of a normalized Exponent result;
and
adding said plurality of mantissas in a plurality of adders each processing a different higher or lower bit portion of a bit sequence of a floating point number, by further performing;
a) generating normalized Exponent determination information during said mantissa addition, said normalized Exponent determination information further being generated from said mantissa addition;
and
b) calculating at least two potential normalized Exponent results while adding said plurality of mantissas, one of said at least two potential normalized Exponent results being a correct normalized Exponent result;
and
c) selecting said correct normalized Exponent result by using carry information and said normalized Exponent determination information.

5 more elements

A floating point adder system for use in an electronic computer device, comprising:

means for aligning a plurality of mantissas and generating an Input Exponent for calculation of a normalized Exponent result;
and
means for adding said plurality of mantissas in a plurality of adders each processing a different higher or lower bit portion of a bit sequence for a floating point number, said adding means further comprising;
means for generating, during said mantissa addition, normalized Exponent determination information from said mantissa addition;
and
means for calculating at least two potential normalized Exponent results while adding said plurality of mantissas, one of said at least two potential normalized exponent results being a correct normalized exponent result;
and
means for selecting said correct normalized Exponent result by using carry information and said normalized Exponent determination information.

5 more elements

Dependencies are inferred from the claim text.

Method and system for immediate exponent normalization in a fast floating point adder

Life of this patent

Method and system for immediate exponent normalization in a fast floating point adder

Life of this patent

Abstract

Claims8