Microprocessor system for automobile control systems

Microprocessor system for automotive vehicle control systems with redundant data processing of the type used for safety-critical control operations, comprising:

• a first, second, and third central unit, wherein each central unit includes a respectively associated bus, a respectively associated read-only and random access memory, and a respectively associated input and output unit,
• comparators coupled between the buses of the first, second, and third central units for checking the data processed by the first, second and third central units for correlation,
• a fourth bus system common to said first, second and third central units, wherein said first, second, and third central units execute the same program,
• a first bypass coupled between the buses of the first and second central units,
• a second bypass coupled between the buses of the second and third central units, said first and second bypasses enabling the first, second and third central units to jointly read data and execute commands, wherein said first, second and third central units along with their respectively associated read-only and random access memory, their input and output units, and their periphery units, form two complete and one incomplete data processing systems,
• wherein said two complete data processing systems further include redundant periphery units for providing two complete control signal circuits,
• wherein the capacity of the read-only and random access memory of the first, second and third central units combined, is twice the capacity of that needed if no redundancy was employed, and wherein upon the failure of one of said first, second, or third central units, the faulty central unit is identified by majority decision, and wherein one of said two complete data processing systems is selected to operate the vehicle control system under an emergency mode.