Selective call receiver having an apparatus for modifying an analog signal to a digital signal and method therefor

An apparatus, comprising:

• a combination circuit coupled to an analog input signal having a bandwidth and a carrier frequency and coupled to an analog feedback signal for generating an analog output signal operating at the carrier frequency;
• a bandpass filter coupled to the analog output signal for generating a filtered analog signal;
• a plurality of mixers coupled to the filtered analog signal for generating a plurality of down-converted analog signals,
• wherein the plurality of mixers are coupled to a plurality of clock signals operating at a predetermined injection frequency, and
• wherein the plurality of clock signals are offset from each other by a predetermined phase offset;
• a plurality of analog-to-digital converters coupled to the plurality of down-converted analog signals for generating a corresponding plurality of digital signals;
• a plurality of digital mixers coupled to the corresponding plurality of digital signals for generating a plurality of up-converted digital signals,
• wherein the plurality of digital mixers are coupled to a corresponding plurality of digital clock signals operating at the predetermined injection frequency, and
• wherein the corresponding plurality of digital clock signals are offset from each other by the predetermined phase offset;
• a second combination circuit coupled to the plurality of up-converted digital signals for generating a digital output signal operating at the carrier frequency;
• and
• a digital-to-analog converter coupled to the digital output signal for generating the analog feedback signal.

An apparatus, comprising:

• a combination circuit coupled to an analog input signal having a bandwidth and a carrier frequency and coupled to an analog feedback signal for generating an analog output signal operating at the carrier frequency;
• a bandpass filter coupled to the analog output signal for generating a filtered analog signal;
• a plurality of mixers coupled to the filtered analog signal for generating a plurality of down-converted analog signals, wherein the plurality of mixers are coupled to a plurality of clock signals operating at a predetermined injection frequency, wherein the plurality of clock signals are offset from each other by a predetermined phase offset, and wherein each of the plurality of mixers comprises
• a phase shift circuit coupled to the filtered analog signal for generating a phase-shifted signal, and
• a switching network coupled to the phase-shifted signal for generating a selected one of the plurality of down-converted analog signals;
• a plurality of sigma-delta converters coupled to the plurality of down-converted analog signals and coupled to a corresponding plurality of second digital clock signals operating at a submultiple of the predetermined injection frequency, and offset from each other by the predetermined phase offset for generating a corresponding plurality of digital signals;
• a plurality of memory cells coupled to the corresponding plurality of digital signals for generating a plurality of up-converted digital signals,
• wherein the plurality of memory cells are coupled to a corresponding plurality of digital clock signals operating at the predetermined injection frequency, and
• wherein the corresponding plurality of digital clock signals are offset from each other by the predetermined phase offset;
• a multiplexer circuit coupled to the plurality of up-converted digital signals for generating a digital output signal operating at the carrier frequency;
• and
• a digital-to-analog converter coupled to the digital output signal for generating the analog feedback signal.

A selective call receiver, comprising:

• a radio receiver, comprising
• an antenna for generating an analog signal;
• a combination circuit coupled to the analog signal having a bandwidth and a carrier frequency and coupled to an analog feedback signal for generating an analog output signal operating at the carrier frequency;
• a bandpass filter coupled to the analog output signal for generating a filtered analog signal;
• a plurality of mixers coupled to the filtered analog signal for generating a plurality of down-converted analog signals,
• wherein the plurality of mixers are coupled to a plurality of clock signals operating at a predetermined injection frequency, and
• wherein the plurality of clock signals are offset from each other by a predetermined phase offset;
• a plurality of analog-to-digital converters coupled to the plurality of down-converted analog signals for generating a corresponding plurality of digital signals;
• a plurality of digital mixers coupled to the corresponding plurality of digital signals for generating a plurality of up-converted digital signals,
• wherein the plurality of digital mixers are coupled to a corresponding plurality of digital clock signals operating at the predetermined injection frequency, and
• wherein the corresponding plurality of digital clock signals are offset from each other by the predetermined phase offset;
• a second combination circuit coupled to the plurality of up-converted digital signals for generating a digital output signal operating at the carrier frequency;
• and
• a digital-to-analog converter coupled to the digital output signal for generating the analog feedback signal;
• a plurality of low pass filters coupled to the corresponding plurality of digital signals for generating a corresponding plurality of filtered digital signals;
• and
• a processor coupled to the radio receiver, the processor adapted to:
• cause the radio receiver to receive a radio message;
• and
• process the radio message from the corresponding plurality of filtered digital signals generated by the radio receiver.

A selective call receiver, comprising:

• a radio receiver, comprising
• an antenna for generating an analog signal;
• a combination circuit coupled to the analog signal having a bandwidth and a carrier frequency and coupled to an analog feedback signal for generating an analog output signal operating at the carrier frequency;
• a bandpass filter coupled to the analog output signal for generating a filtered analog signal;
• a plurality of mixers coupled to the filtered analog signal for generating a plurality of down-converted analog signals,
• wherein the plurality of mixers are coupled to a plurality of clock signals operating at a predetermined injection frequency, and
• wherein the plurality of clock signals are offset from each other by a predetermined phase offset;
• a plurality of analog-to-digital converters coupled to the plurality of down-converted analog signals for generating a corresponding plurality of digital signals;
• a plurality of digital mixers coupled to the corresponding plurality of digital signals for generating a plurality of up-converted digital signals,
• wherein the plurality of digital mixers are coupled to a corresponding plurality of digital clock signals operating at the predetermined injection frequency, and
• wherein the corresponding plurality of digital clock signals are offset from each other by the predetermined phase offset;
• a second combination circuit coupled to the plurality of upconverted digital signals for generating a digital output signal operating at the carrier frequency;
• and
• a digital-to-analog converter coupled to the digital output signal for generating the analog feedback signal;
• a second bandpass filter coupled to the digital output signal for generating a filtered digital signal;
• and
• a processor coupled to the radio receiver, the processor adapted to:
• cause the radio receiver to receive a radio message;
• and
• process the radio message from the filtered digital signal generated by the radio receiver.