US 6,275,432 B1 · Method of reading and writing data using local data read and local data write circuits

Abstract

A sense amplifier for a very high density integrated circuit memory using CMOS technology is described. Each sense amplifier includes first and second local sense amplifier drive transistors, one connecting the P channel transistors to VCC; the other connecting the N channel transistors to VSS. A read amplifier circuit is provided within each sense amplifier and is operated by read control signals. Internal nodes of the latch of the sense amplifier are coupled by pass transistors that are responsive to column write control signals. Local data write driver transistors are also provided to selectively couple the pass transistors to VCC-Vt or VSS in response to further data write control signals. A relatively wider power line is coupled to the drive transistors to provide VCC thereto, and a narrower line is used to control those first sense amplifier drive transistors. Corresponding wide and narrow lines are used for the second local sense amplifier drive transistors which couple the N channel transistors to ground. Each sense amplifier may be shared between first and second pairs of bit lines through the use of isolation transistors and a corresponding isolation signal.

Claims34

Dependent claims

A method of reading and writing in an integrated circuit memory having a plurality of bit line pairs with a plurality of corresponding sense amplifiers associated therewith and coupled thereto, each sense amplifier including a latch having internal latch nodes communicable with one or more corresponding bit lines, the method comprising the steps of:

powering a selected sense amplifier latch by selectively operating first and second local sense amplifier drive transistors connected to said selected latch;
for reading data from a memory cell along a bit line communicating with said selected sense amplifier latch:
(a) developing a latch node signal at said internal latch node, said latch node signal corresponding to the data from the memory cell, and
(b) operating a local read amplifier associated with said selected sense amplifier, said operating the local read amplifier step including
(i) applying at least one data read signal to said local read amplifier and
(ii) using said latch node signal to control said at least one data read signal without the data read signal substantially affecting said latch node signal;
and
for writing data into a selected sense amplifier or to a memory cell along a bit line corresponding to said selected sense amplifier, operating a local data write circuit associated with said sense amplifier, said operating the local write circuit step including:
(i) applying at least one data write signal to said local data write driver circuit,
(ii) developing a write signal in said local data write driver circuit, and
(iii) communicating said write signal to both an internal node of the sense amplifier latch corresponding to the memory cell and to the corresponding bit line.

8 more elements

Dependencies are inferred from the claim text.

Method of reading and writing data using local data read and local data write circuits

Life of this patent

Method of reading and writing data using local data read and local data write circuits

Life of this patent

Abstract

Claims34