Ferroelectric voltage boost circuits
AssigneeRamtron International Corporation
InventorJarrod Eliason
Life of this patent
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Abstract
A boost circuit for a ferroelectric memory operated in a low voltage supply environment is achieved by floating a local supply voltage and using a single boost via one or more appropriately sized ferroelectric boost capacitors to elevate the local supply level to the desired boosted voltage. When boosting is not required, the local supply voltage is tied to the system external power supply through an appropriately sized PMOS transistor.
Claims20
A voltage boosting circuit (10) comprising:
- an output node for providing a boosted voltage (VBOOST) greater than an external power supply voltage (VDD);
- a P-channel transistor (M2) having a gate and a current path for selectively connecting the output node to the external power supply voltage or for isolating the output node from the external power supply voltage;
- means (M0, M1, N1) for pulling the gate of the Pchannel transistor to the boosted voltage level (VBOOST);
- a ferroelectric capacitor (Z1) having a first electrode connected to the output node;
- and
- means for driving a second electrode of the ferroelectric capacitor from low to high when the output node is isolated from the external power supply voltage (N2, optional delay and buffer).
A voltage boosting circuit comprising:
- an input node;
- an output node;
- an internal circuit node;
- a dual inverter circuit having an input coupled to the input node, an output, and a center tap;
- a delay circuit having an input coupled to the output of the dual inverter circuit and an output;
- ferroelectric capacitor means having a first node coupled to the output of the delay circuit and a second node coupled to the output node;
- a first transistor having a current path coupled between the input node and the internal circuit node, and a gate coupled to a source of supply voltage;
- a second transistor having a current path coupled between the output node and the internal circuit node, and a gate coupled to the center tap of the dual inverter circuit;
- and
- a third transistor having a current path coupled between the output node and the source of supply voltage, and a gate coupled to the internal circuit node.
A method for operating a ferroelectric memory in a low voltage external power supply environment comprises:
- floating a local supply voltage and using a single boost via an appropriately sized ferroelectric boost capacitor to elevate the local supply level to the desired boosted voltage greater than the low voltage external power supply voltage;
- adjusting the amount of boost as a function of the external power supply voltage;
- and
- tying the local supply voltage to the power supply through a large PMOS transistor when boosting is not required.
Dependencies are inferred from the claim text.