Chip enable input buffer

A memory device that is operable with a supply voltage (Vcc) and is controlled with electric signals generated with an external supply voltage by an electronic system, said memory device comprising:

• a plurality of logic circuits electrically connected with said supply voltage (Vcc);
• and
• an external voltage buffer circuit comprising:
• a clamping circuit electrically connected with said supply voltage (Vcc) and said external supply voltage for generating a clamped signal;
• and
• an activation circuit electrically connected with said clamping circuit, said electronic system and said plurality of logic circuits for receiving said clamped signal and generating an output signal to control activation of said plurality of logic circuits when directed by said electric signals.

A method of buffering of electric signals with a memory device, comprising the acts of:

• providing a supply voltage (Vcc);
• providing an external supply voltage;
• generating a clamped signal with a clamping circuit, said supply voltage (Vcc) and said external supply voltage;
• generating said electric signals with said external supply voltage;
• and
• directing an activation circuit with said electric signals and said clamped signal to generate an output signal.