Circuit with non-volatile memory and method of erasing the memory a number of bits at a time
AssigneeU.S. Philips Corporation
InventorRoger Cuppens
Life of this patent
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Abstract
The threshold of a number of storage transistors is shifted in steps. After such a step, a collective current through the main current channels of a number of these storage transistors is sensed. The same gate-source voltage is applied to all these transistors during sensing. The collective current indicates whether the threshold of all transistors has been sufficiently shifted. If not, a further threshold shifting step is applied.
Claims10
A method of erasing a non-volatile memory, the memory comprising a matrix of storage transistors and a sense circuit provided at least for a set of the storage transistors, each storage transistor having an adjustable threshold, different threshold values representing an erased and programmed state respectively, wherein the method of erasing comprises the steps of
- shifting the threshold of at least two of said storage transistors in said set towards threshold values that represent the erased state;
- sensing a current through the main current channel of the storage transistors in said set after said shifting;
- repeating said shifting and sensing until the current has entered a predetermined current range;
- said sensing comprising sensing a combined current drawn through the sense circuit in parallel by the main current channels of a plurality of the storage transistors from said set whose threshold has been shifted, while applying substantially a same gate-source voltage to said plurality of the storage transistors.
A circuit comprising a non-volatile memory with
- a memory matrix with columns of storage transistors, each storage transistor having an adjustable threshold voltage, different threshold voltage values representing an erased and programmed state respectively;
- a sense circuit;
- a selection circuit coupled to the transistors for allowing selectable ones from a set of the of the storage transistors to conduct current to the sense circuit while receiving a gate-source voltage between the erased and programmed threshold value;
- an erase circuit for applying threshold shifting signals at least to the set of storage transistors;
- an erase control circuit arranged for
- activating the erase circuit during a limited time-interval at least for the set of the storage transistors,
- subsequently controlling the selection circuit to select simultaneously a plurality of the storage transistors whose threshold has been shifted, and to apply a same gate-source voltage to said plurality of storage transistors, so that a combined current from the storage transistors of the plurality in parallel is conducted to the sense circuit;
- reading the sense circuit to obtain information about the combined current;
- repeating said activating, controlling and reading until the collective current is in a predetermined current range.
Dependencies are inferred from the claim text.