Semiconductor memory device having sense and data lines for use to read and write operations

Abstract

A high-capacity semiconductor memory device is provided which is capable of eliminating an influence of capacitive coupling between read sense lines and write data lines and exhibiting a high operation speed and a large operation margin. In the present invention, a sense line for transferring a read data signal from a local sense amplifier provided for one or several columns to a next stage global sense amplifier provided for a peripheral circuit is shielded by a data line for transferring write data from a write control circuit provided for the peripheral circuit to each column. A fact that the read sense line and the write data line are not operated simultaneously is used to employ the other line as a shield line in each of a read operation and a write operation. Thus, cross talk caused from the interline capacitive coupling between adjacent signal lines or a signal line pair constituted by two signal lines can be prevented and reduction in the read speed and its dispersion can be prevented.

Dependencies are inferred from the claim text.