Self-driven synchronous rectification circuit for low output voltage DC-DC converters

A method of rectifying a symmetrically varying power signal that remains at a zero voltage level for a portion of a conduction cycle in a DC-DC converter including first and second synchronous rectifiers having respective activation terminals, comprising:

• activating one of said first and second synchronous rectifiers during a non-zero voltage portion of said conduction cycle;
• maintaining said activated one of said first and second synchronous rectifiers in an activated state and activating the other one of said first and second synchronous rectifiers during a zero voltage portion of said conduction cycle immediately following said non-zero voltage portion by distributing residual charge remaining on one of said activation terminals to the other one of said activation terminals;
• and
• upon transition to a subsequent non-zero voltage portion of said conduction cycle, deactivating said activated one of said first and second synchronous rectifiers by conducting said residual charge on a corresponding one of said activation terminals to ground and maintaining the other one of said first and second synchronous rectifiers in an activated state.

A synchronous rectification circuit for use in a DC-DC power converter having a primary side power circuit providing a symmetrically varying power signal that remains at a zero voltage level for a portion of a conduction cycle, comprising:

• a first secondary side power circuit inductively coupled to said primary side power circuit, said first secondary side power circuit providing an output voltage, said first secondary side power circuit comprising first and second synchronous rectifiers having respective activation terminals and being alternately activating in synchronism with non-zero voltage level portions of said conduction cycle;
• and
• a second secondary side power circuit inductively coupled to said first secondary side power circuit and having polarity reversed with respect to said first secondary side power circuit, said second secondary side power circuit comprising first and second switching devices having respective activation terminals respectively coupled to said activation terminals of said first and second synchronous rectifiers and being alternately activating in inverse synchronism with said non-zero voltage level portions of said conduction cycle, said first and second synchronous rectifiers having lower activation voltages thresholds than said first and second switching devices;
• wherein, during a zero voltage level portion of said conduction cycle, residual charge remaining on any one of said activation terminals of said first and second synchronous rectifiers and said first and second switches is distributed through said second secondary side power circuit to remaining ones of said activation terminals to cause both said first and second synchronous rectifiers to be activated during said zero voltage level portion while both said first and second switching devices are turned off, and during a subsequent non-zero voltage level portion of said conduction cycle, one of said first and second switches is activated causing one of said first and second synchronous rectifiers to be deactivated.

A power converter comprising:

• a primary side power circuit providing a periodically varying power signal;
• and
• a secondary side power circuit inductively coupled to said primary side circuit, said secondary side power circuit including:
• a first secondary transformer winding and a second secondary transformer winding inductively coupled to each other;
• first and second switches having respective activation terminals connected to respective ends of said second secondary transformer winding, and
• first and second synchronous rectifiers having respective activation terminals connected to respective ends of said second secondary transformer winding and to said activation terminals of said second and first switches, respectively, said first and second synchronous rectifiers having respective lower activation voltage thresholds than said first and second switches;
• wherein, during a zero voltage level portion of said power signal, residual charge remaining on any one of said activation terminals of said first and second synchronous rectifiers and said first and second switches is distributed through said second secondary side power circuit to remaining ones of said activation terminals to cause both said first and second synchronous rectifiers to be activated during said zero voltage level portion while both said first and second switching devices are turned off.