Circuit for driving address electrodes of a plasma display panel system

Abstract

A circuit for driving address electrodes of a plasma display panel system is disclosed. A data interfacing section outputs red, green and blue data arranged on 12 columns×107 rows to an address electrode driving IC. The address electrode driving IC has 4 input pins for receiving 4 bits of the red, green and blue data from the data interfacing section over 18 times and 72 output pins for outputting the received red, green and blue data. Accordingly, each of the address electrode driving ICs processes the red, green and blue data corresponding to a multiple of 12. That is, the red, green and blue data arranged on an identical row of the interfacing section having the red, green and blue data arranged in 12 columns×107 rows are inputted in an identical address electrode driving IC. Accordingly, the data interfacing section can execute an operation for outputting the red, green and blue data although all of 1280 units of the red, green and blue data are not inputted. Consequently, a storage capacity of the data interfacing section can be reduced and a cost of production of the flat panel display apparatus can be reduced.

Dependencies are inferred from the claim text.