Differential charge pump with low voltage common mode feedback circuit

A charge pump including a common mode feedback circuit comprising:

• a first signal source responsive to a reference signal and a common mode feedback signal, the first signal source providing a first signal;
• a first output signal path coupled to the first signal source, the first output signal path providing a path for a first output signal, the first output signal being at least a portion of the first signal;
• a first switched signal path coupled to the first signal source, the first switched signal path including an up signal controlled switch having active and non-active states, the state of the up signal controlled switch being controlled by an up signal, with the first switched signal path providing a path for a first switched signal, the first switched signal being at least a portion of the first signal, when the up signal controlled switch is in the active state;
• a second signal source responsive to the reference signal and the common mode feedback signal, the second signal source providing a second signal;
• a second output signal path coupled to the second signal source, the second output signal path providing a path for a second output signal, the second output signal being at least a portion of the second signal;
• a second switched signal path coupled to the second signal source, the second switched signal path including an down signal controlled switch having active and non-active states, the state of the down signal controlled switch being controlled by an down signal, with the second switched signal path providing a path for a second switched signal, the second switched signal being at least a portion of the second signal, when the down signal controlled switch is in the active state;
• and
• a common mode circuit coupled to the first output signal path and the second output signal path, the common mode circuit generating the common mode feedback signal based on a common mode component of the first and second output signals;
• wherein the first signal source is a current source, the first signal is a first current, the second signal source is a current source, and the second signal is a second current;
• wherein the up signal controlled switch is a first field effect transistor whose gate receives the up signal, and the down signal controlled switch is a second field effect transistor whose gate receives the down signal;
• wherein the first current source is comprised of a first reference source field effect transistor whose gate receives a reference signal and a first feedback field effect transistor whose gate receives the common mode feedback signal, the drains of the first reference source field effect transistor and the first feedback transistor being coupled to a power source and the drains of the first reference source field effect transistor and the first feedback transistor being operatively coupled so as to form the first current, and wherein the second current source is comprised of a second reference source field effect transistor whose gate receives a reference signal and a second feedback field effect transistor whose gate receives the common mode feedback signal, the drains of the second reference source field effect transistor and the second feedback transistor being coupled to a power source and the drains of the second reference source field effect transistor and the second feedback transistor being operatively coupled so as to form the second current;
• further comprising a third switched signal path and a fourth switched signal path, the third switched signal path being coupled to the second current source, and including an up-complement signal controlled switch having active and non-active states, the state of the up-complement signal controlled switch being controlled by an up-complement signal, with the third switched signal path providing a path for a third switched signal, the third switched signal being at least a portion of the second current, when the up-complement signal controlled switch is in the active state, and the fourth switched signal path being coupled to the first current source, and including a down-complement signal controlled switch having active and non-active states, the state of the down-complement signal controlled switch being controlled by a down-complement signal, with the fourth switched signal path providing a path for a fourth switched signal, the fourth switched signal being at least a portion of the first current, when the down-complement signal controlled switch is in the active state.

A differential charge pump utilizing a common mode feedback circuit comprising:

• first means for receiving an up signal;
• second means for receiving a down signal;
• third means coupled to said first means for generating a first source signal comprised of means of generating two first source currents;
• fourth means coupled to said second means for generating a second source signal comprised of means of generating two second source currents;
• fifth means coupled to said third means and said fourth means for generating a differential output signal, using the first source signal, the second source signal, the up signal, and the down signal;
• sixth means for comparing a common mode component of the differential output signal with a reference to form a feedback signal;
• and
• seventh means for controlling the third means for generating the first source signal and the fourth means for generating the second source signal, the seventh means for controlling including a reference signal and controlling a first current of the two first source currents and a first current of the two second source currents, and the feedback signal controlling a second current of the two first source currents and a second current of the two second source currents.

A charge pump comprising:

• a first circuit comprising:
• an up switch responsive to an up input to generate an up output signal, the up switch having a plurality of states, the state of the up switch being determined by the up input;
• an up signal source operatively coupled to the up switch, the up signal source generating an up source signal formed by combining a first up signal source signal controlled by a reference signal and a second up signal source signal controlled by a common mode feedback signal;
• and
• a magnitude of said up output signal is dependent on the state of the up switch and the up source signal;
• a second circuit comprising:
• a down switch responsive to a down input to generate a down output signal, the down switch hating a plurality of states, the state of the down switch being determined by the down input;
• a down signal source operatively coupled to the down switch, the down signal source generating a down source signal formed by combining a first down signal source controlled by the reference signal and a second down signal source controlled by the common mode feedback signal;
• and
• a magnitude of said down output signal is dependent on the state of the down switch and the down source signal;
• the up output signal and the down output signal together forming a differential output signal;
• and
• a common mode feedback means coupled to said differential output signal for determining a common mode of the differential output signal and for providing the common mode feedback signal to the up signal source and to the down signal source.