Domino logic circuit and method
AssigneeIntel Corporation
InventorsYibin Ye, Siva G. Narendra, Vivek K. De
Life of this patent
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Abstract
A domino logic circuit includes input connections to receive a clock signal and at least one input data signal. In one embodiment, the domino logic circuit includes a dynamic stage comprising precharge circuitry, and a static stage that comprises discharge circuitry. In another embodiment, the domino logic circuit includes a dynamic stage comprising discharge circuitry, and a static stage that comprises precharge circuitry. Different configurations and transistor types have also been described. The circuitry can provide improved speed performance, or increase noise immunity.
Claims24
A domino circuit comprising:
- a dynamic circuit stage having at least one data input node to receive at least one input data signal, a clock input node to receive a clock signal and an output data node to provide an output data signal on when the clock signal is a first state;
- and
- a static circuit stage having an input node coupled to receive the output data signal from the dynamic circuit stage, the static circuit stage comprising a plurality of series coupled pull-up transistors coupled to the at least one data input signal, and a precondition circuit coupled to a first intermediate node located between the plurality of pull-up transistors, the precondition circuit provides either a pre-charge or discharge voltage to the first intermediate node when the clock signal is in a second state.
A domino circuit comprising:
- a dynamic stage circuit having an output connection, the dynamic stage circuit comprising a first pull-up transistor coupled to the output connection, a latch circuit coupled to the output connection, and a plurality of pull-down transistors coupled to the output connection, the dynamic stage circuit further comprising a pre-charge transistor coupled to a first intermediate node of the plurality of pull-down transistors;
- and
- a static stage circuit having an input node coupled to the output connection of the dynamic stage circuit, the static stage circuit comprising an output node and a plurality of pull-up transistors connected in series between the output node and an upper voltage supply connection, a discharge transistor coupled to a second intermediate node of the plurality of pull-up transistors.
A domino circuit comprising:
- a dynamic stage circuit having an output connection, the dynamic stage circuit comprising a first pull-up transistor coupled to the output connection, a latch circuit coupled to the output connection, and a plurality of pull-down transistors coupled to the output connection, the dynamic stage circuit further comprising a discharge transistor coupled to a first intermediate node of the plurality of pull-down transistors;
- and
- a static stage circuit having an input node coupled to the output connection of the dynamic stage circuit, the static stage circuit comprising an output node and a plurality of pull-up transistors connected in series between the output node and an upper voltage supply connection, a pre-charge transistor coupled to a second intermediate node of the plurality of pull-up transistors.
A method of increasing response time of a domino circuit comprising:
- pre-charging intermediate nodes of series coupled pull-down transistors of a dynamic stage circuit during a pre-charge phase;
- and
- discharging intermediate nodes of series coupled pull-up transistors of a static stage circuit coupled to the dynamic stage circuit, where discharging the intermediate nodes is performed during the pre-charge phase.
A method of increasing noise immunity of a domino circuit comprising:
- pre-discharging intermediate nodes of series coupled pull-down transistors of a dynamic stage circuit during a pre-charge phase;
- and
- pre-charging intermediate nodes of series coupled pull-up transistors of a static stage circuit coupled to the dynamic stage circuit, where pre-charging the intermediate nodes is performed during the pre-charge phase.
Dependencies are inferred from the claim text.