Self-resetting logic circuits and method of operation thereof

A self-resetting circuit, comprising:

• a logic circuit operative to transition an output signal from a first logic state to a second logic state responsive to a first logic state transition of an input signal, wherein said logic circuit has an input node configured to receive said input signal, and a reset input node and an output node, and is operative to produce a transition in said output signal at said output node said responsive to said input signal when said reset input node is at a first one of said first and second logic states and to reset said output signal to said first logic state when said reset input is at a second one of said first and second logic states;
• and
• a bistable reset circuit coupled to said logic circuit and operative to be triggered by said transition of said output signal from said first logic state to said second logic state to reset said output signal to said first logic state within a first predetermined interval following said transition of said output signal from said first logic state to said second logic state, and to be armed by a second logic state transition of said input signal next succeeding said first logic state transition, wherein said reset circuit is armed within a second predetermined interval following said second logic state transition that is less than said first predetermined interval, wherein said bistable reset circuit has a first input node coupled to said output node of said logic circuit, a second input node coupled to said input node of said logic circuit, and an output node coupled to said reset input node of said logic circuit, and is operative to set said reset input node of said logic circuit to said first one of said first and second logic states responsive to said input signal and to set said reset input node of said logic circuit to said second one of said first and second logic states responsive to said output signal.

A method of operating a logic circuit, the method comprising the steps of:

• transitioning an output signal of the logic circuit from a first logic state to a second logic state responsive to a first logic state transition of an input signal to the logic circuit;
• triggering a reset circuit coupled to the logic circuit responsive to the transition of the output signal to from the first logic state to the second logic state to reset the output signal of the logic circuit to the first logic state within a first predetermined interval following the transition of the output signal from the first logic state to the second logic state;
• and
• arming the reset circuit responsive to a second logic state transition of said output signal next succeeding the first logic state transition within a second predetermined interval following the second logic state transition that is substantially less than the first predetermined interval.