Absolute control of non overlap time in switch mode power controller output stages

A switching power supply comprising:

• first and second power switches that, in response to switch drive signals, switch on and off to generate at least one regulated output voltage;
• and
• a power switch control module including:
• a controller having a clock input coupled to a clocking signal, an enable input, and first and second drive outputs providing the switch drive signals;
• a current source that senses the drive outputs, and in response, provides a current source output that switches on and off;
• a timing capacitor, coupled to the current source, that charges when the current source is on;
• a switch that discharges the timing capacitor when the current source is off;
• and
• a voltage comparator that compares the charge level on the timing capacitor to a reference voltage, and that outputs a trigger signal to the enable input of the controller when the charge level on the timing capacitor exceeds the reference voltage;
• wherein when one drive output switches logic state in response to the clocking signal, turning off its associated power switch, the current source charges the timing capacitor until the trigger signal causes the other drive output to switch logic state, turning on its associated power switch.

A method of controlling switch drive signals in a switching power supply having first and second power switches that, in response to the switch drive signals, switch on and off to generate at least one regulated output voltage, the method comprising:

• providing a controller having a clock input coupled to a clocking signal, an enable input, and first and second drive outputs that provide the switch drive signals;
• in response to the clocking signal, switching the logic state of the drive output of a power switch that is on, to turn off the power switch that is on;
• charging a timing capacitor;
• comparing the charge level on the timing capacitor to a reference voltage, and outputting a trigger signal to the enable input of the controller when the charge level on the timing capacitor exceeds the reference voltage;
• in response to the trigger signal, switching the logic state of the other drive output to turn on its associated power switch;
• and
• discharging the timing capacitor.