Ultrafast nanoscale field effect transistor
AssigneeInternational Business Machines Corporation
InventorsWilm E. Donath, Dennis M. Newns, Pratap C. Pattnaik
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Abstract
A method and structure for a field effect transistor (FET) includes a source region, a drain region, a channel region extending between the source region and the drain region, a gate region, and a gate oxide region separating the gate region from other regions of the FET. The channel region is a Mott insulator. The gate oxide region is thicker than the channel region, and the gate oxide region includes a higher dielectric permittivity than the Mott insulator material.
Claims20
An integrated circuit chip comprising:
- a first conductor;
- a second conductor opposite said first conductor;
- a transition metal oxide below said first conductor and said second conductor forming a channel region;
- and
- a gate insulator below said transition metal oxide region;
- a gate conductor below said insulator, wherein:
- said transition metal oxide includes conductively doped regions;
- and
- said first conductor region and said second conductor region are positioned over said conductively doped regions of said channel region.
An integrated circuit chip comprising:
- a source region;
- a drain region opposite said source region;
- a channel region below said source region and said drain region,
- a gate oxide region below said channel region;
- and
- a gate conductor region below said gate oxide region, wherein:
- said channel region comprises a transition metal oxide material;
- said gate oxide region has a dielectric permittivity greater than said transition metal oxide material;
- said channel region includes conductively doped regions;
- and
- said source region and said drain region are conductive and are positioned over said conductively doped regions of said channel region.
A field effect transistor comprising:
- a first conductor;
- a second conductor opposite said first conductor;
- a transition metal oxide below said first conductor and said second conductor forming a channel region;
- a gate insulator below said transition metal oxide region;
- and
- a gate conductor below said insulator, wherein:
- said transition metal oxide includes conductively doped regions;
- and
- said first conductor region and said second conductor region are positioned over said conductively doped regions of said channel region.
Dependencies are inferred from the claim text.