HDP-CVD method for forming passivation layers with enhanced adhesion

A method for passivating an integrated circuit microelectronics fabrication comprising:

• providing a semiconductor substrate having formed therein integrated circuit components;
• forming upon the semiconductor substrate a patterned microelectronics layer;
• forming over the patterned microelectronics layer a first portion of a first silicon containing dielectric layer employing a high density plasma chemical vapor deposition (HDP-CVD) method employing a first lower deposition:sputter ratio optimized to fill a series of gaps defined by a series of patterns within the patterned microelectronics layer;
• forming upon the first portion of the first silicon containing dielectric layer a second and completing portion of the first silicon containing dielectric layer employing a second higher deposition:sputtering ratio optimized to increase surface topography;
• forming a silicon nitride dielectric passivation layer over the first silicon containing dielectric layer with attenuated delamination of the underlying portions of the first silicon containing dielectric layer;
• attaching interconnection leads to the integrated circuit components;
• and
• forming an overcoating molded organic polymer layer over the silicon nitride passivation layer and semiconductor substrate with improved adhesion.