Method of manufacturing shallow source/drain junctions in a salicide process

A method of manufacturing a MOS device structure having a substrate area of a first polarity type, a source region, a drain region, and a silicon gate over a thin oxide, comprising:

• forming a BARC layer over the gate;
• depositing a silicon layer over the source region and drain region;
• planarizing the silicon layer and the BARC layer and exposing the gate;
• implanting the silicon layer with species of a second polarity type;
• annealing the MOS device structure and diffusing the species from the silicon layer into the source region and the drain region;
• depositing a refractory metal on the silicon gate and on the silicon layer;
• and
• Reacting the refractory metal and forming a silicide in the silicon gate and in the silicon layer.

A method for creating a shallow source and shallow drain region in a transistor structure comprising:

• forming an oxide layer on a substrate of a first polarity;
• depositing a first silicon layer on the oxide;
• defining a silicon gate on the first silicon layer;
• defining the source region and the drain region in the substrate, the source region and the drain region coupled to the silicon gate through the oxide;
• depositing a spacer dielectric over the silicon gate;
• etching the spacer dielectric and defining a dielectric spacer conforming to the silicon gate;
• forming a BARC layer over the gate;
• depositing a second silicon layer and substantially conforming the second silicon layer to the silicon gate, source, drain, and dielectric spacer;
• planarizing the second silicon layer and the BARC layer until the BARC layer is removed and the second silicon layer is substantially flush with the spacer dielectric;
• implanting the second silicon layer over the source region with a species of the second polarity type and further biasing the source region to a second polarity and implanting the second silicon layer over the drain region with a species of the second polarity type and further biasing the drain region to a second polarity;
• annealing the transistor structure;
• depositing a refractory metal on the first silicon layer and the second silicon;
• reacting the refractory metal and forming a silicide in the first silicon layer and in the second silicon layer.