Self-aligned contact process for a crown shaped dynamic random access memory capacitor structure

A method of fabricating a crown shaped, capacitor structure, in a SAC opening, on a semiconductor substrate, wherein the bottom portion of the SAC opening is lined with a silicon nitride spacer, comprising the steps of:

• providing insulator capped, gate structures, on a gate insulator layer, with insulator spacers on the sides of said insulator capped, gate structures, and with a source/drain region located in an area of said semiconductor substrate, not covered by said insulator capped, gate structures, or by said insulator spacers;
• depositing a thick silicon oxide layer;
• forming said SAC opening, in said thick silicon oxide layer, with the width of said SAC opening larger than the space between said insulator capped, gate structures, exposing a source/drain region, located between said insulator capped, gate structures, and exposing a top portion of said insulator capped, gate structures;
• depositing a silicon nitride layer;
• performing an anisotropic dry etch procedure to create a first silicon nitride spacer, on the sides of said SAC opening;
• forming an organic plug, in the bottom portion of said SAC opening;
• performing an isotropic etch procedure to remove a top portion of said first silicon nitride spacer from the region of said SAC opening, not filled with said organic plug, creating a second silicon nitride spacer, on the sides of said bottom portion of said SAC opening;
• forming a polysilicon storage node structure, with said polysilicon storage node structure interfacing said thick silicon oxide layer, in a top portion of said SAC opening, and interfacing said second silicon nitride spacer, in said bottom portion of said SAC opening;
• removing a top portion of said thick silicon oxide layer, resulting in a crown shaped, polysilicon storage node structure, comprised of a top portion of said polysilicon storage node structure, extending upwards from a bottom portion of said thick silicon oxide layer, and a bottom portion of said polysilicon storage node structure, interfacing said second silicon nitride spacer, in said bottom portion of said SAC opening,
• forming a capacitor dielectric layer, on said crown shaped, polysilicon storage node structure;
• and
• forming a polysilicon cell plate structure, on said capacitor dielectric layer, resulting in said crown shaped, capacitor structure, located in said SAC opening.