Laser anneal method of a semiconductor layer
AssigneeSanyo Electric Co., Ltd.
InventorsHidenori Ogata, Ken Wakita, Kiyoshi Yoneda, Yoshihiro Morimoto, Tsutomu Yamada, Kazuhiro Imao, Takashi Kuwahara
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AssigneeSanyo Electric Co., Ltd.
InventorsHidenori Ogata, Ken Wakita, Kiyoshi Yoneda, Yoshihiro Morimoto, Tsutomu Yamada, Kazuhiro Imao, Takashi Kuwahara
Estimating the term…
For obtaining p-Si by irradiating a laser beam to an a-Si layer to polycrystallize, an energy level in a region to be irradiated by the laser beam is set such that a level at the rear area of the region along a scan direction of the laser beam is lower than that at the front area or the center area of the region. The energy level at the front area or the center area of the region is set such that it is substantially equal to or more than the upper limit energy level which maximizes a grain size of the p-Si obtained. since an energy profile is set as described above, when the laser beam is scanned on the a-Si layer, an irradiated energy of the laser on the region is gradually lowered from the upper limit as the laser beam passes through, which allows the semiconductor layer to be annealed within an optimal energy level during the latter half of the annealing process.
A semiconductor layer laser annealing method for improving characteristic of a semiconductor layer formed on a substrate by irradiating a laser beam, wherein
A semiconductor layer laser annealing method for obtaining a polycrystal semiconductor layer by irradiating a laser beam on an amorphous semiconductor layer formed on a substrate, wherein
A semiconductor layer laser annealing method for obtaining a polycrystal semiconductor layer by irradiation of an amorphous semiconductor layer formed on a substrate with a laser beam, wherein an energy level in a region to be irradiated by the laser beam is set such that the level in the rear area of a region along a scan direction of the laser beam is lower than the level at the front or the center area of the region and wherein the peak level in the rear region is lower than the upper limit energy level which maximizes semiconductor layer grain size.
Dependencies are inferred from the claim text.