Extractor and schematic viewer for a design representation, and associated method
AssigneeLSI Logic Corporation
InventorNader Fakhry
Life of this patent
Estimating the term…
Loading patent…
AssigneeLSI Logic Corporation
InventorNader Fakhry
Estimating the term…
A program translates an EDIF netlist that defines a circuit into a data file containing a predetermined subset of the circuit-defining data. The program operates on netlists that define designs and library cells. The data file is useful to describe the circuit, or a portion of the circuit, in a simpler and more intuitive format, so that users unfamiliar with the circuit or with EDIF format can quickly understand the circuit components and connectivity. The subset of circuit data is parsed out of the EDIF netlist and stored in the data file. The data file is useful for extracting and clearly describing the instances connected to a specified signal. The data file is also useful for generating a graphical or textual display of the circuit. A user may specify primary ports, signals, global ports, and cell instances to focus the subset of circuit data on the portion of the circuit of interest. Signals may be traced on a graphical display. Another program can create an EDIF netlist from the data file. Methods for extracting and formatting this data receive command line or interactive input from a user.
A method of extracting and representing a circuit design comprising the steps of:
A computer program product comprising:
Dependencies are inferred from the claim text.