Fault tolerant clock voter with recovery

In a system having an input clock signal and a latch, the latch normally operating so that the clock signal may be passed for utilization so long as the clock signal is valid, but, upon the occurrence of a fault, the system being operable to set the latch so as to prevent the clock signal from being utilized, the improvement comprising:

• delay means operable to produce at least one delayed clock signal;
• and detecting means connected to the delay means to receive the delayed clock signal and operable to produce a reset signal;
• and,
• means connecting the detecting means to the latch to present the reset signal thereto so that the clock signal may again be utilized upon occurrence of the correction of the fault.

A fault tolerant clock voter with recovery comprising:

• I) a plurality of input clock managers each having
• A) an input for receiving an input clock signal;
• B) a first output for providing an output clock signal for use in voting, said output clock signal representing the input clock signal;
• C) a plurality of latches, each having
• 1. an first input for receiving a different one of a plurality of input signals each of which is indicative of a different anomaly in the input clock signal, said latch being set upon the receipt of a signal;
• 2. an output for providing a fault signal when the latch is set;
• and,
• 3. a second input for receiving a reset signal to reset the latch and remove the fault signal at the input;
• D) combining means connected to receive the signals at the output of the latches to provide a second output of the clock manager for use in providing a fault signal when any of the latches are set;
• II) a collector connected to said clock managers to receive the signals on each of the first and second outputs thereof, said collector operable to produce a secondary clock signal representing each clock signal received from the first outputs of the clock manager only when there is no fault signal at the second output of such clock manager, said collector operable to provide a resultant output indicative of the combination of the secondary clock signals whenever there are two or more of the secondary clock signals and,
• III) means for determining when an anomaly is corrected to produce a reset signal to the second input of the latch receiving the input signal indicative of that anomaly so that when all anomalies for that clock manager have been corrected, the first output of that clock manager may be used by the collector to produce a secondary clock signal in accordance therewith.

The method of providing a voted clock signal representing a plurality of individual clock signals which may contain one of a plurality of anomalies, comprising the steps of:

• A. producing a fault signal for each anomaly in each individual clock signal;
• B. producing a substitute clock signal for each individual clock signal which does not have any anomalies;
• C. producing a voted signal from the substitute clock signals when there are three or more substitute clock signals;
• and
• D. producing a voted signal from the substitute clock signals in combination with an independent clock signal when there are two substitute clock signals.

A collector for processing a plurality of clock signals each accompanied by a fault signal when the clock signal it accompanies has a fault;

• first means connected to receive the clock signals and the fault signals and operable to produce a plurality of secondary clock signals each representing one of the clock signals when there is no fault signal accompanying such clock signal;
• second means connected to receive the secondary clock signals and operable to produce a resultant output indicative of the combination of the secondary clock signals whenever there are two or more of the secondary clock signals;
• an independent clock signal source;
• third means connected to receive the first output signals and the independent clock signal and operable to provide an additional signal indicative of the combination of the secondary clock signals and the independent clock signal when there are two fault signals, said second means receiving the additional signal so that the resultant output is indicative of the secondary clock signals in combination with the additional clock signal when there are two fault signals.