System and method for handling interrupts in a multi-processor computer

In a multiprocessor computer system, a method for handling a system management interrupt comprising:

• a) waiting for the computer to enter system management mode;
• b) selecting a first processor of the multiprocessor computer system;
• c) locating one or more registers and checking for contents of each register of the first processor;
• d) examining the contents to determine if the first processor caused the system management interrupt;
• e) handling the interrupt for the first processor if the first processor did cause the system management interrupt;
• and
• f) repeating a-e for a next processor of the multiprocessor computer system.

A program for controlling operation of a multiprocessor computer system upon receipt of a system management interrupt, the program comprising:

• a) instructions responsive to the computer system entering a system management mode for selecting a first processor of the multiprocessor computer system;
• b) instructions for locating a register and checking for contents of the register of the first processor;
• c) instructions for examining the contents to determine if the first processor caused the system management interrupt;
• d) instructions for handling the interrupt for the first processor if the first processor did cause the system management interrupt;
• and
• e) instructions for repeating a-d for a next processor of the multiprocessor computer system regardless of whether a determination was made if the first processor caused the system management interrupt.

A program for controlling operation of a multiprocessor computer system upon receipt of a system management interrupt, the program comprising:

• a) instructions responsive to the computer system entering a system management mode for selecting a first processor of the multiprocessor computer system;
• b) instructions for locating a register and checking for contents of the register of the first processor;
• c) instructions for examining the contents to determine if the first processor caused the system management interrupt;
• d) instructions for handling the interrupt for the first processor if the first processor did cause the system management interrupt;
• and
• e) instructions for repeating a-d for a next processor of the multiprocessor computer system only if it was a determination was made that the first processor did not cause the system management interrupt.