Multiprocessing system employing pending tags to maintain cache coherence
AssigneeSun Microsystems, Inc.
InventorsAshok Singhal, Alan Yamauchi, Gary Lauterbach
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AssigneeSun Microsystems, Inc.
InventorsAshok Singhal, Alan Yamauchi, Gary Lauterbach
Estimating the term…
A pending tag system and method to maintain data coherence in a processing node during pending transactions in a transaction pipeline. A pending tag storage unit may be coupled to a cache controller and configured to store pending tags each indicative of a coherence state for a data line corresponding to a pending transaction within the transaction pipeline. The pending tag storage unit includes a total amount of storage which is substantially less than an amount required to store tags contained in the full tag array for the cache memory. When a pending tag exists in the pending tag storage unit, the coherence state of the corresponding data line within the cache memory is dictated by the pending tag for snoop operations. Accordingly, data coherence is maintained during the period when transactions are pending, e.g., not yet presented to a processor and cache. When a pending transaction is completed, the coherence state of the corresponding data line as indicated by the fill tag array may be overwritten by the coherence state as indicated by the pending tag and the pending tag may deleted from the pending tag storage.
A processing node for connection to a transaction bus in a multiprocessor system, said processing node comprising:
A cache system within a node of a multi-node computer system, wherein a processor is coupled to said cache system and to a bus between nodes, said cache system comprising:
A computer system comprising:
A cache coherence method for a computer system having at least two nodes coupled by a transaction bus for communicating transactions between nodes, wherein a transaction on said transaction bus becomes a pending transaction in a node before completing in the node, wherein at least one node has a processor and cache memory, and wherein said cache memory comprises a plurality of cache lines, the method comprising:
A method for snooping bus transactions in a computer system having at least two nodes coupled by a transaction bus, the method comprising:
Dependencies are inferred from the claim text.