US 6,272,513 B1 · Multiplying device

Abstract

A multiplying device operates for implementing multiplication between multiplicand data and multiplier data in a two's complement representation form. Each of the multiplicand data and the multiplier data has n bits, where n denotes a predetermined even number. A 1-bit sign extension of the multiplicand data is executed to generate data having n+1 bits. In the multiplying device, n/2 partial product data pieces are generated on the basis of the data having n+1 bits and the multiplier data according to second-order Booth's algorithm. Each of the n/2 partial product data pieces has n+1 bits. There is a plurality of adders connected and arranged in a tree configuration. The adders operate for adding the n/2 partial product data pieces. The adders include a final-stage adder which outputs multiplication result data representing a product of the multiplicand data and the multiplier data. The multiplication result data has 2n−1 bits. In the tree arrangement of the adders, there is provided a plurality of sign extension elements for implementing sign extensions of one data pieces, which correspond to lower bits of the multiplier data, in pairs of data pieces inputted into the adders.

Claims4

Dependent claims

A multiplying device for implementing multiplication between multiplicand data and multiplier data in a two's complement representation form, the multiplicand data and the multiplier data each having n bits, where n denotes a predetermined even number, the multiplying device comprising:

1-bit extension means for executing a 1-bit sign extension of the multiplicand data to generate data having n+1 bits, and for outputting the data having n+1 bits;
partial product generation means for generating n/2 partial product data pieces on the basis of the data having n+1 bits which is outputted from the 1-bit extension means and on the basis of the multiplier data according to second-order Booth's algorithm, the n/2 partial product data pieces each having n+1 bits;
and
addition means including a plurality of adders connected and arranged in a tree configuration, the adders adding the n/2 partial product data pieces generated by the partial product generation means, the adders including a final-stage adder which outputs multiplication result data representing a product of the multiplicand data and the multiplier data, the multiplication result data having 2n−1 bits;
wherein the adding means includes a plurality of sign extension means for implementing sign extensions of one data pieces, which correspond to lower bits of the multiplier data, in pairs of data pieces inputted into the adders.

2 more elements

A multiplying device for implementing either sign-added multiplication or sign-free multiplication between multiplicand data and multiplier data in response to a change signal, the multiplicand data and the multiplier data each having n bits, where n denotes a predetermined even number, the multiplying device comprising:

2-bit extension means for executing a 2-bit sign extension of the multiplicand data in response to a highest bit of the multiplicand data to generate data having n+2 bits, and outputting the data having n+2 bits when the change signal requires sign-added multiplication to be implemented, and for executing a 2-bit 0 extension of the multiplicand data with respect to a highest bit side thereof to generate data having n+2 bits, and outputting the data having n+2 bits when the change signal requires sign-free multiplication to be implemented;
partial product generation means for generating n/2 partial product data pieces on the basis of the data having n+2 bits which is outputted from the 2-bit extension means and on the basis of the multiplier data according to second-order Booth's algorithm, the n/2 partial product data pieces each having n+2 bits;
addition means including a plurality of adders connected and arranged in a tree configuration, the adders adding the n/2 partial product data pieces generated by the partial product generation means, the adders including a final-stage adder which outputs data having 2n bits;
and
multiplication result output means for, in cases where the change signal requires sign-free multiplication to be implemented and a highest bit of the multiplier data is “1”, adding n higher bits of the data outputted from the final-stage adder in the adding means and the multiplicand data to provide an addition result, and connecting n lower bits of the data outputted from the final-stage adder to a lowest bit side of the addition result to generate and output multiplication result data having 2n bits and representing a product of the multiplicand data and the multiplier data, and for, in other cases, transmitting and outputting the data outputted from the final-stage adder in the adding means as multiplication result data having 2n bits and representing a product of the multiplicand data and the multiplier data;
wherein the adding means includes a plurality of sign extension means for implementing sign extensions of one data pieces, which correspond to lower bits of the multiplier data, in pairs of data pieces inputted into the adders.

3 more elements

Dependencies are inferred from the claim text.

Multiplying device

Life of this patent

Multiplying device

Life of this patent

Abstract

Claims4