Software tool to allow field programmable system level devices

A system for designing a field programmable system level integrated circuit, comprising:

• a software simulator for simulating, layout, a field programmable system level integrated circuit using co-verification software;
• instruction set software for outputting register contents for the co-verification of the field programmable system level integrated circuit;
• field programmable gate array (FPGA) software for creating a bit stream for an FPGA device part, and for creating a program code for the micro-controller Dart of the FPSLIC;
• and
• said FPGA software for creating, from the bit stream and the program code, in a program file, a combined-bit stream that has data for both the FPGA device and the instruction code for a RISC micro-controller.

A method for designing a field programmable system level integrated circuit (FPSLIC), comprising the steps of:

• simulating, pre-layout, the field programmable system level integrated circuit using co-verification software;
• generating, from an implementation of logic for the field programmable system level integrated circuit with instruction-set software, a post layout, simulation model of the implementation for co-verification of the field programmable system level integrated circuit;
• simulating, with an instruction-set simulator, program code;
• outputting register contents from the instruction-set software, for the co-verification of the field programmable system level integrated circuit;
• creating a bit stream for a field programmable gate array (FPGA) device part of the field programmable system level integrated circuit;
• and
• creating a program code for a micro-controller part of the field programmable system level integrated circuit.

A system for designing a field programmable system level integrated circuit, comprising:

• a software simulator for simulating, pre-layout, a field programmable system level integrated circuit using co-verification software;
• instruction set software for outputting register contents for the co-verification of the field programmable system level integrated circuit;
• and
• field programmable gate array (FPGA) software for creating a bit stream for an FPGA device part, and for creating a program code for the micro-controller part of the FPSLIC.

A system for designing a field programmable system level integrated circuit, comprising:

• software means for simulating, pre-layout, a field programmable system level integrated circuit using co-verification software;
• instruction means for outputting register contents for the co-verification of the field programmable system level integrated circuit;
• and
• field programmable gate array (FPGA) means for creating a bit stream for an FPGA device part, and for creating a program code for the micro-controller part of the FPSLIC.

A system for designing a field programmable system level integrated circuit (FPSLIC), comprising:

• software means for simulating, pre-layout, a field programmable system level integrated circuit using co-verification software;
• instruction set software for outputting register contents for the co-verification of the field programmable system level integrated circuit;
• field programmable gate array (FPGA) means for creating a bit stream for an FPGA device part, and for creating a program code for the micro-controller part of the FPSLIC;
• and
• said FPGA means for creating, from the bit stream and the program code, in a program file, a combined-bit stream that has data for both the FPGA device and the instruction code for a RISC micro-controller.