Method and apparatus for correcting signal skew differentials between two interconnected devices
AssigneeTexas Instruments Incorporated
InventorGary J. Verdun
Life of this patent
Estimating the term…
Abstract
A device and method for eliminating system clock skew in portable computer (15) units used with an expansion base (20) including an oscillator (175), resistors (225, 230) and capacitor (235) tuned to a predetermined propagation delay time to align the portable subsystem clock signals (180, 185, 190) with the expansion base clock signal (195) at the expansion base connector (25) and thus conform to clock skew tolerance specifications for the PCI interface signal standard.
Claims21
An apparatus, comprising:
- an oscillator in a computer for generating subsystem clock signals and an expansion base clock signal;
- and
- an RC filter circuit coupled to said oscillator, said RC filter circuit tuned to compensate for signal propagation delays between said subsystem clock signals and said expansion base clock signal by adding a predetermined phase lead to the subsystem clock signals relative to the expansion base clock signal.
An apparatus, comprising:
- an oscillator in a computer for generating subsystem clock signals and an expansion base clock signal;
- and
- an RC filter circuit coupled to said oscillator, said RC filter circuit tuned to compensate for signal propagation delays between said subsystem clock signals and said expansion base clock signal by adding a predetermined phase lag to the subsystem clock signals relative to the expansion base clock signal.
A device, comprising:
- an oscillator, the oscillator having first and second circuit leads;
- a first resistor, said first resistor serially connected at one lead to the first circuit lead of the oscillator;
- a second resistor, said second resistor serially connected at one lead to the second circuit lead of the oscillator;
- and
- a capacitor, said capacitor having a first lead connected to a second lead of the first resistor and a second lead connected to ground.
A device, comprising:
- an oscillator, the oscillator having first and second circuit leads;
- a first resistor, said first resistor serially connected at one lead to the first circuit lead of the oscillator;
- a second resistor, said second resistor serially connected at one lead to the second circuit lead of the oscillator;
- a capacitor, said capacitor connected to a second lead of the first resistor;
- a connector, said connector comprising a plurality of pins;
- and
- a plurality of system clock leads, each lead having one end connected to said second lead of the first resistor and a second end connected to a pin on the said connector.
A device, comprising:
- an oscillator, the oscillator having first and second circuit leads;
- a first resistor, said first resistor serially connected at one lead to the first circuit lead of the oscillator;
- a second resistor, said second resistor serially connected at one lead to the second circuit lead of the oscillator;
- a capacitor, said capacitor connected to a second lead of the first resistor;
- and
- an expansion clock lead having a first end connected to the second end of the said second resistor and a second end connected to a pin on the a connector.
An apparatus, comprising:
- an oscillator in a computer for generating subsystem clock signals and an expansion base clock signal, said oscillator having a first output for outputting said subsystem clock signals and a second output for outputting said expansion base clock signal;
- and
- an RC filter circuit coupled to said oscillator, said RC filter circuit tuned to compensate for signal propagation delays between said subsystem clock signals and said expansion base clock signal by adding a predetermined phase lead to the subsystem clock signals relative to the expansion base clock signal.
An apparatus, comprising:
- an oscillator in a computer for generating subsystem clock signals and an expansion base clock signal, said oscillator having a first output for outputting a subsystem clock signals and a second output for outputting said expansion base clock signal and said RC filter circuit is coupled to said first output;
- and
- an RC filter circuit coupled to said oscillator, said RC filter circuit tuned to compensate for signal propagation delays between said subsystem clock signals and said expansion base clock signal by adding a predetermined phase lag to the subsystem clock signals relative to the expansion base clock signal.
An apparatus, comprising:
- a computer coupled to an expansion base;
- an oscillator in said computer for generating subsystem clock signals and an expansion base clock signal;
- and
- an RC filter circuit coupled to said oscillator, said RC filter circuit tuned to compensate for signal propagation delays between said subsystem clock signals and said expansion base clock signal by adding a predetermined phase lead to the subsystem clock signals relative to the expansion base clock signal.
An apparatus, comprising:
- a computer coupled to an expansion base;
- an oscillator in said computer for generating subsystem clock signals and an expansion base clock signal;
- and
- an RC filter circuit coupled to said oscillator, said RC filter circuit tuned to compensate for signal propagation delays between said subsystem clock signals and said expansion base clock signal by adding a predetermined phase lag to the subsystem clock signals relative to the expansion base clock signal.
An apparatus, comprising:
- a computer coupled to an expansion base;
- an oscillator in said computer for generating subsystem clock signals and an expansion base clock signal, said oscillator having a first output for outputting said subsystem clock signal and a second output for outputting said expansion base clock signal;
- and
- an RC filter circuit coupled to said oscillator, said RC filter circuit tuned to compensate for signal propagation delays between said subsystem clock signals and said expansion base clock signal by adding a predetermined phase lead to the portable computer clock signals relative to the expansion base clock signal.
An apparatus, comprising:
- a computer coupled to an expansion base;
- an oscillator in said computer for generating subsystem clock signals and an expansion base clock signal, said oscillator having a first output for outputting said subsystem clock signal and a second output for outputting said expansion base clock signal;
- and
- an RC filter circuit coupled to said oscillator, said RC filter circuit tuned to compensate for signal propagation delays between said subsystem clock signals and said expansion base clock signal by adding a predetermined phase lag to the portable computer clock signals relative to the expansion base clock signal.
An apparatus, comprising:
- a computer coupled to an expansion base;
- an oscillator in said computer, said oscillator having first and second circuit leads;
- a first resistor, said first resistor serially connected at one lead to the first circuit lead of the oscillator;
- a second resistor, said second resistor serially connected at one lead to the second circuit lead of the oscillator;
- and
- a capacitor, said capacitor connected to a second lead of the first resistor.
An apparatus, comprising:
- a computer coupled to an expansion base;
- an oscillator in said computer, said oscillator having first and second circuit leads;
- a first resistor, said first resistor serially connected at one lead to the first circuit lead of the oscillator;
- a second resistor, said second resistor serially connected at one lead to the second circuit lead of the oscillator;
- a capacitor, said capacitor connected to a second lead of the first resistor;
- a connector coupling said computer to said expansion base, said connector comprising a plurality of pins;
- and
- a plurality of system clock leads, each lead having a first end connected to the second end of said first resistor and a second end connected to a pin on said connector.
An apparatus, comprising:
- a computer coupled to an expansion base;
- an oscillator in said computer, said oscillator having first and second circuit leads;
- a first resistor, said first resistor serially connected at one lead to the first circuit lead of the oscillator;
- a second resistor, said second resistor serially connected at one lead to the second circuit lead of the oscillator;
- a capacitor, said capacitor connected to a second lead of the first resistor;
- and
- an expansion clock lead having a first end connected to the second end of the second resistor and a second end connected to a pin on the connector.
Dependencies are inferred from the claim text.