ATM transmission system with subsystems interconnected through reduced number of signal lines

An ATM (Asynchronous Transfer Mode) transmission system for transferring and receiving an ATM cell to and from another ATM transmission system interconnected thereto, comprising:

• a multiplexer for multiplexing ATM cells to be sent to the interconnected ATM transmission system;
• a maintenance information processor for generating maintenance information to be sent to the interconnected ATM transmission system, and for processing maintenance information sent from the interconnected ATM transmission system;
• and
• an interface circuit for establishing interface with the interconnected ATM transmission system,
• said interface circuit comprising:
• a data transmitter for assembling and transmitting a multiframe including an information field and an overhead portion having a multiframe sync pattern, the multiframe being assembled by inserting into the information field the ATM cells multiplexed by said multiplexer, and by inserting into the overhead portion the maintenance information fed from said maintenance information processor,
• a data receiver for deassembling received data including the multiframe sent from the interconnected ATM transmission system into the ATM cells and the maintenance information, and for providing said maintenance information processor with the maintenance information, and
• a demultiplexer for demultiplexing the ATM cells output from said data receiver into individual ATM cells,
• wherein said data transmitter and said data receiver each comprise parallel processors whose number equals a least common multiple of one or more ratios between a minimum interface rate and one or more other interface rates of the one or more interconnected ATM transmission systems;
• said ATM transmission system comprising an ATM cell transfer and acquisition circuit for providing, at the minimum interface rate, each of said parallel processors of said data transmitter with an ATM cell to be transmitted, and for acquiring, from each of said parallel processors of said data receiver, a received ATM cell sent at the minimum interface rate.