Nonvolatile semiconductor memory device having a reference cell array
AssigneeSamsung Electronics Co., Ltd.
InventorSoo-Hwan Choi
Life of this patent
Estimating the term…
Abstract
A semiconductor memory device having a plurality of reference cells for detecting states of and verifying written data in plurality of memory cells includes a memory cell array formed of the plurality of memory cells and a reference cell array formed of a plurality of units, each unit formed of the plurality of reference cells, reference cell having a same size as that of each memory cell. A sense amplifier circuit detects a difference between current flowing through a memory cell and a corresponding reference cell. Each unit in the reference cell array is formed of a plurality of the reference cells serially connected between the sense amplifier circuit and a control circuit for controlling the reference cells.
Claims13
A semiconductor memory device, comprising:
- a memory cell array formed of a plurality of memory cells;
- a reference cell array formed of a plurality of reference units, each reference unit including a plurality of reference cells, each reference cell having a same size as each memory cell;
- a sense amplifier circuit for detecting a difference between current flowing through a memory cell and a corresponding reference cell;
- and
- a control circuit for generating a reference cell control signal;
- wherein the plurality of the reference cells are serially connected between the sense amplifier circuit and the control circuit, and
- wherein the plurality of reference cells include a common control terminal for receiving the reference cell control signal.
A semiconductor memory device, comprising:
- a memory cell array including a plurality of memory cells;
- a memory cell control block for controlling operations of the memory cells;
- a reference cell array including a plurality of reference units, each reference unit including a plurality of reference cells;
- a reference cell control block for controlling operations of the reference cells in correspondence with the operations of the memory cells;
- and
- a sense amplifier circuit for detecting a difference between current flowing through a memory cell and a corresponding reference unit;
- wherein each of the reference units includes a plurality of the reference cells serially connected between the sense amplifier circuit and the reference cell control block;
- and
- wherein each of the reference cel units includes at least two reference cell control;
- and commonly connected control input terminal.
A nonvolatile semiconductor memory device, comprising:
- a memory cell array;
- and
- a reference cell array, the reference cell array including a plurality of reference cell units, each reference cell unit including at least two reference cells having a commonly connected control input terminal.
A nonvolatile semiconductor memory device, comprising:
- a memory cell array;
- and
- a reference cell array, the reference cell array including a plurality of reference cell units, each reference cell unit including at least a first and a second reference cells;
- wherein the first reference cell includes a first source, drain, and a gate;
- and
- wherein the second reference cell includes a second source, drain, and gate, the first source being connected to the second drain and the first gate being connected to the second gate.
Dependencies are inferred from the claim text.