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US 6,272,034 B1Granted
Semiconductor memory device
AssigneeMitsubishi Denki Kabushiki Kaisha
InventorsMitsuya Kinoshita, Fukashi Morishita, Kazutami Arimoto, Takeshi Fujino, Tetsushi Tanizaki, Takahiro Tsuruda, Teruhiko Amano, Mako Kobayashi
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Abstract
A control circuit portion which controls the operations of memory cells is concentrated in a central portion and heat radiation plates are placed thereon via adhesive. A semiconductor integrated circuit having a function of the MPU or the like is placed above the control circuit portion via a bump electrode. The control circuit portion and a memory block are formed on separate chips respectively.
Claims4
A semiconductor memory device comprising:
- a first chip including a plurality of memory blocks each having a plurality of memory cells and including a control circuit portion surrounded by said plurality of memory blocks and having a control circuit which controls operations of said memory cells;
- a bump electrode formed around said control circuit portion;
- and
- a second chip connected to said first chip via said bump electrode and arranged above said control circuit portion,
- said second chip having its size substantially identical to that of said control circuit portion, including a heat radiation member provided inward from its outer periphery and including at least one electrode adjacent said radiation member for connection with an external component.
2 more elements
Dependencies are inferred from the claim text.