Z-buffer pre-test for 3D graphic performance enhancement
AssigneeSilicon Integrated Systems Corp.
InventorsChien-Chung Hsiao, Tsung-Feng Lee
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Abstract
The present invention discloses a method and system, which discards invalid pixels by using cache memories storing depth values of all pixels having inputted which satisfy a Z Test Mode. The present invention is applied in a three-dimensional graphic system, and uses a plurality of pre-test units to process input pixels in a parallel manner to avoid system performance degeneration due to sequential execution used in prior art. The plurality of pre-test units read the depth values stored in a pre-test Z cache in the system and compare them with the depth values of input pixels being processed according to the Z Test Mode. If the answer is yes, the input pixels are discarded. Otherwise, the content of the pre-test Z cache is updated.
Claims4
A method of removing hidden surfaces for reducing memory access and thus improving the performance of a three-dimensional graphic system, said three-dimensional graphic system including a pre-test Z cache, a pre-test Z module, a control logic, a Z-buffer cache and a frame buffer memory, said pre-test Z cache and Z-buffer cache storing depth values of all pixels having been inputted which satisfy a Z Test Mode, the method comprising the following steps:
- (a) determining if input pixels being processed are in said pre-test Z cache and Z-buffer cache;
- (b) controlling operations of said frame buffer memory, pre-test Z cache and Z-buffer cache by said control logic according to the results of step (a);
- and
- (c) said pre-test Z module comparing the depth values stored in said pre-test Z cache with the depth values of the input pixels being processed in a parallel manner to enhance the efficiency of the graphic system;
- if the comparing result does not satisfy the Z Test Mode, the input pixels being discarded;
- otherwise, the depth values of the input pixels being written to said pre-test Z cache.
A system of removing hidden surfaces for reducing memory access and thus improving the performance of a three-dimensional graphic system, comprising:
- a FIFO for storing a plurality of input pixels being processed;
- a pre-test Z cache for storing depth values of all pixels having been inputted which satisfy a Z Test Mode;
- a pre-test Z module including a plurality of pre-test units, said pre-test units comparing the depth values stored in said pre-test Z cache with the depth values of the input pixels at the output end of the FIFO in a parallel manner to enhance the efficiency of said graphic system;
- if the comparing result does not satisfy the Z Test Mode, the input pixels being discarded;
- otherwise, the depth values of the input pixels being written to said pre-test Z cache;
- a validity-test module connected to said pre-test Z module for executing validity-test functions for the input pixels being processed;
- a Z-buffer cache connected to said pre-test Z cache for storing depth values of all pixels having been inputted which satisfy the Z Test Mode;
- a Z-buffer test module connected to the Z-buffer cache and validity-test module for comparing the depth values of input pixels passing through said validity-test module with the depth values stored in the Z-buffer cache;
- if the comparing result does not satisfy the Z Test Mode, the input pixels being discarded;
- otherwise, the depth values of the input pixels being written to said pre-test Z cache;
- a frame buffer memory connected to said Z-buffer cache, pre-test Z cache and validity-test module for storing all pixels having passed through validity tests;
- and
- a control logic for managing operations of said FIFO, pre-test Z cache, Z-buffer cache and frame buffer memory.
Dependencies are inferred from the claim text.