Capacitor-based digital-to-analog converter with continuous time output

A digital-to-analog converter (DAC) comprising:

• an array of switched input capacitors which store samples of charge proportional to a digital input signal;
• and
• an analog output circuit which couples said samples of charge to generate an output analog signal that is proportional to said digital input signal, wherein said output circuit comprises a zeroth order sample-and-hold circuit and at least one capacitor that couples the input and output of said analog output element during a hold phase of said sample-and-hold circuit, wherein
• said sample-and-hold circuit comprises first and second stages having respective first and second amplifiers and wherein said first and second stages are cascaded together during a sample phase so that said first and second stages comprise a single operational amplifier and so that said analog output signal is stored in a storage element in a feedback path between an output of said second stage and an input of said second stage, said first stage comprises a transconductance-type amplifier.

A device comprising;

• a plurality of charge storage elements which store samples of charge proportional to a digital input signal;
• and
• an amplifying circuit with an output hold function having at least one input and at least one output terminals, wherein a control signal sets the operation to either amplify or hold phase;
• and
• a feedback circuit for coupling the output and the input of said amplifying circuit so that an output signal is that is proportional to said digital input signal is produced during the amplify phase, wherein
• said amplifying circuit comprises first and second amplifier stases which are coupled by a switch means so that during an amplify phase said first and second stages comprise a single operational amplifier.

A digital-to-analog converter comprising;

• and array of switched input capacitors which store samples of charge proportional to a digital input signal;
• and
• an analog output circuit which couples said samples of charge to generate an analog output signal that is proportional to said digital input signal, wherein
• said output circuit comprises an amplifying circuit with an output hold function, and wherein a control signal sets the operation to either amplify or hold phase, and at least one capacitor that couples the input and output of said analog output circuit during the hold phase, said amplifying circuit comprising a transconductance-type amplifier, wherein
• said amplifying circuit comprises first and second stages, said first and second stages are cascaded together during an amplify phase so that said first and second stages comprise a single operational amplifier.