Nonlinear filter correction of multibit ΣΔ modulators

An analog-to-digital converter for converting analog input signals to parallel digital form, said analog-to-digital converter comprising:

• a sigma-delta modulator including an input port to which said analog input signals are applied, and also including a forward signal path for resonating, sampling and quantizing a difference signal for producing a parallel digital data stream which represents the analog input signal, and also including a feedback signal path for generating an analog reconstruction of said digital parallel output, for aiding in generating said difference signals, said analog reconstruction being subject to nonlinearities which are equivalent to an error signal added to said analog reconstruction, said error signal being encoded with a delay by said sigma-delta modulator;
• a summing circuit including a noninverting input port coupled to the output of said forward signal path, and also including an inverting input port, for subtracting an error signal from said parallel digital data stream;
• and
• nonlinear filter correction means coupled to said output port of said forward signal path, for receiving said parallel digital data stream and said encoded, delayed error signal, said filter correction means comprising (a) a tapped delay line, including at least one tap, coupled to said output of said forward signal path.

A corrected multibit analog-to-digital converter for converting analog input signals to parallel digital form, said compensated multibit analog-to-digital converter comprising:

• a first summing node including first and second input ports, said analog input signals being applied to said first input port, for subtracting a feedback signal from said analog input signals, to thereby produce difference signals;
• a resonator coupled to said first summing node for resonating said difference signals, for producing resonated difference signals;
• a multibit analog-to-digital quantizer coupled to said resonator, for converting said resonated difference signals into a stream of parallel digital samples, said analog-to-digital quantizer introducing adc noise and distortion signals into said parallel digital samples;
• a feedback path coupled to said analog-to-digital quantizer and to said second port of said first summing node, said feedback path including a digital-to-analog converter, for reconstructing analog feedback signals from said parallel digital samples, said digital-to-analog converter introducing dac noise and distortion signals into said analog feedback signals, and for applying said analog feedback signals and their associated noise and distortion to said second port of said first summing node, thereby closing a feedback loop, whereby said resonator is a resonator loop filter, said difference signals are the difference between said analog input signals and said analog feedback signals with their associated noise and distortion, said resonated difference signals include, within a given passband, adc noise and distortion equivalent signals of a phase which tend to cancel said adc noise and distortion signals produced by said analog-to-digital quantizer, and said stream of multibit digital samples produced by said multibit analog-to-digital converter include components of said dac noise and distortion signals;
• a second summing node including a first port coupled to receive said stream of multibit digital samples and also including a second port, for taking the difference between correction signals applied to said second port and said multibit digital samples, for thereby generating corrected multibit digital signals;
• a tapped delay line coupled to receive said stream of multibit digital samples, for generating delayed samples of said multibit digital samples;
• a plurality of look-up tables, at least one of said look-up tables being coupled to a tap of said tapped delay line for receiving said delayed samples of said multibit digital samples, and for generating, at least within said given passband in response to said delayed samples of said multibit digital samples, at least one of the real and imaginary components of said dac noise and distortion;
• a third summing node coupled to said plurality of look-up tables and to said second port of said second summing node, for summing together those of said real and imaginary components of said dac noise and distortion produced by said look-up tables, for thereby generating said correction signals for said second port of said second summing node.

A method for operating an analog-to-digital converter including

• (a) a multibit sigma-delta modulator including an input port to which said analog input signals are applied, and which produces an oversampled digital parallel data stream within a given bandpass at its output port, the performance of said modulator being subject to errors caused by both dynamic and static nonlinearity, said multibit sigma-delta modulator tending to reducing the noise of said adc quantizer within said bandpass, but not significantly reduce the noise of said dac within said bandpass, and
• (b) nonlinear filter correction means coupled to said output port for receiving said parallel digital data stream, for estimating said error, and for subtracting said estimated error from said parallel digital data stream, for thereby improving the dynamic range of said sigma-delta modulator, said method comprising the steps of:
• applying to said analog input port a sinusoidal analog training signal, and which is of an amplitude selected to exercise the full dynamic range of said sigma-delta modulator;
• storing in memory a set of sequential samples of said digital signal resulting from said step of applying;
• using a model of the errors in said sigma-delta modulator, performing mathematical operations, on data stored in memory as a result of said step of storing, which define the delays and amplitude transfer functions of said nonlinear filter correction means, for tending to reduce said error.