Back to results
US 6,271,717 B1Granted
Bias circuit for series connected decoupling capacitors
AssigneeInternational Business Machines Corporation
InventorsRussell J. Houghton, Christopher P. Miller
Life of this patent
Estimating the term…
Abstract
A semiconductor circuit for providing decoupling capacitance to an integrated circuit voltage supply that includes a decoupling capacitance comprised of an array of memory cells connected in series at a node and a source of biasing voltage connected to the array of memory cells at the node for maintaining the voltage level at the node lower than the voltage level of the voltage supply.
Claims3
A bias circuit for providing a selected bias voltage level comprising:
- a first transistor circuit path for providing a reference generation voltage, the first transistor circuit path being connected to a first input lead at a first voltage level and including a plurality of series connected transistors;
- a second transistor circuit path connected to a second input lead at a second voltage level and including a plurality of series connected bias transistors;
- an output lead connected between first and second ones of the series connected bias transistors of the second transistor circuit path for providing an output bias voltage;
- and
- a transistor connected to the output lead and between the second and a third one of the series connected bias transistors of the second transistor circuit path,
- wherein the first and second series connected bias transistors of the second transistor circuit path are connected to voltage taps between the series connected transistors of the first transistor circuit path.
3 more elements
Dependencies are inferred from the claim text.