Dynamic threshold source follower voltage driver circuit

A die comprising:

• a driver circuit including:
• a driver input node;
• a driver output node;
• a first inverter to receive an input signal from the driver input node and provide an inverted input signal at a first inverter output node;
• a second inverter to receive the inverted input signal from the first inverter output node and provide a driver output signal at the driver output node;
• and
• an nFET pull-up transistor connected between the driver output node and a power supply node, the nFET pull-up transistor having a gate tied to the driver input node, and wherein the nFET pull-up transistor is tied to a body bias voltage node, and wherein the first inverter has a pFET pull-up transistor and an nFET pull-down transistor and the pFET and nFET transistor of the first inverter are either both forward body biased or both not forward body biased and wherein the second inverter has a pFET pull-up transistor and an nFET pull-down transistor and wherein the pFET pull-up transistors of the first and second inverters have a body tied to a first body bias voltage node and the nFET pull-down transistors of the first and second inverters have a body tied to the body bias voltage node to which the body of the nFET pull-up transistor is tied.

A die comprising:

• a driver circuit including:
• a driver input node;
• a driver output node;
• a first inverter to receive an input signal from the driver input node and provide an inverted input signal at a first inverter output node;
• a second inverter to receive the inverted input signal from the first inverter output node and provide a driver output signal at the driver output node;
• and
• an nFET pull-up transistor connected between the driver output node and a power supply node, the nFET pull-up transistor having a gate tied to the driver input node and a body tied directly to a power supply node.

A die comprising:

• a driver circuit including:
• a driver input node;
• a driver output node;
• a first inverter to receive an input signal from the driver input node and provide an inverted input signal on a first inverter output node;
• an nFET pull-up transistor coupled between the driver output node and a power supply node, the nFET pull-up transistor having a gate tied to the driver input node and a body directly tied to the power supply node;
• and
• an nFET pull-down transistor coupled between the driver output node and a ground node, the nFET pull-down transistor having a gate tied to the first inverter output node.

A die comprising:

• a driver circuit including:
• a driver input node;
• a driver output node;
• a first inverter to receive an input signal from the driver input node and provide an inverted input signal at a first inverter output node;
• a second inverter to receive the inverted input signal from the first inverter output node and provide a driver output signal at the driver output node;
• and
• an nFET pull-up transistor connected between the driver output node and a power supply node, the nFET pull-up transistor having a gate tied to the driver input node, and wherein a body of the nFET pull-up transistor is tied to the power supply node, and wherein the first inverter has a pFET pull-up transistor and an nFET pull-down transistor and the pFET and nFET transistor of the first inverter are either both forward body biased or both not forward body biased, and
• wherein the second inverter has a pFET pull-up transistor and an nFET pull-down transistor and the pFET pull-up transistors of the first and second inverters have a body tied to a ground node and the nFET pull-down transistors of the first and second inverters have a body tied to the power supply node.