Divided voltage de-coupling structure

In an integrated circuit, a de-coupling circuit comprising:

• a voltage divider including first and second divider elements coupled to positive and negative supply voltages respectively, said first and second divider elements coupled therebetween at a node;
• and
• a p-channel Metal Oxide Semiconductor Field Effect Transistor (PMOSFET) and an n-channel Metal Oxide Semiconductor Field Effect Transistor (NMOSFET) that have their gates coupled at said node, said PMOSFETs and NMOSFETs have sources, drains, and bulks thereof coupled to said positive and negative supply voltages respectively,
• wherein said decoupling circuit is formed on a single integrated circuit substrate, and
• wherein said first and second elements include first and second diode-connected p-type MOSFET transistors coupled between said positive and negative supply voltages.

In an integrated circuit, a de-coupling circuit comprising:

• a voltage divider including first and second elements coupled to positive and negative supply voltages respectively, said first and second elements coupled therebetween at a node;
• and
• first and second p-channel Metal Oxide Semiconductor Field Effect Transistors (PMOSFETs) said first PMOSFET having a gate thereof coupled to said node and a drain, source, and bulk thereof coupled to said positive supply voltage, said second PMOSFET having a source, drain, and bulk thereof coupled to said node and said gate thereof coupled to said negative supply voltage,
• wherein the decoupling circuit is formed on a single integrated circuit substrate, and
• wherein said first and second elements include first and second diode-connected p-type MOSFET transistors coupled between said positive and negative supply voltages.

In an integrated circuit, a decoupling circuit comprising:

• a voltage divider including first and second elements coupled to positive and negative supply voltages respectively, said first and second elements coupled therebetween at a node;
• and
• first and second p-channel Metal Oxide Semiconductor Field Effect Transistors (PMOSFETs) said first PMOSFET having a gate thereof coupled to said node and a drain, source, and bulk thereof coupled to said positive supply voltage, said second PMOSFET having a source, drain, and bulk thereof coupled to said node and said gate thereof coupled to said negative supply voltage,
• wherein the decoupling circuit is formed on a single integrated circuit substrate,
• wherein said first and second elements include first and second diode-connected transistors respectively, coupled between said positive and negative supply voltages and adapted to operate in a sub-threshold conduction configuration.

In a system having an integrated circuit that includes a power supply and a load circuit, a decoupling circuit is coupled to the power supply and the load circuit, the decoupling circuit comprising:

• a voltage divider including first and second divider elements coupled to positive and negative supply voltages respectively, said first and second divider elements coupled therebetween at a node, and
• a p-channel Metal Oxide Semiconductor Field Effect Transistor (PMOSFET) and an n-channel Metal Oxide Semiconductor Field Effect Transistor (NMOSFET) that have their gates coupled at said node, said PMOSFETs and NMOSFETs have sources, drains, and bulks thereof coupled to said positive and negative supply voltages respectively,
• wherein the decoupling circuit is formed on a single integrated circuit substrate,
• wherein said first and second elements include first and second diode-connected p-type MOSFET transistors coupled between said positive and negative supply voltages.

In a system having an integrated circuit that includes a power supply and a load circuit, a de-coupling circuit is coupled to the power supply and the load circuit, the decoupling circuit comprising:

• a voltage divider including first and second divider elements coupled to positive and negative supply voltages respectively, said first and second divider elements coupled therebetween at a node, and
• a p-channel Metal Oxide Semiconductor Field Effect Transistor (PMOSFET) and an n-channel Metal Oxide Semiconductor Field Effect Transistor (NMOSFET) that have their gates coupled at said node, said PMOSFETs and NMOSFETs have sources, drains, and bulks thereof coupled to said positive and negative supply voltages respectively,
• wherein the decoupling circuit is formed on a single integrated circuit substrate,
• wherein said first and second elements include first and second diode-connected transistors respectively, coupled between said positive and negative supply voltages and adapted to operate in a sub-threshold conduction configuration.