Method and apparatus for balancing current in a system with two sets of termination devices
AssigneeIntel Corporation
InventorsSean R. Babcock, Ananda Sarangi
Life of this patent
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AssigneeIntel Corporation
InventorsSean R. Babcock, Ananda Sarangi
Estimating the term…
A method and devices for a current dump circuit that includes a first termination device, a second termination device, and a current dump device. The first termination device resides outside the die of an IC. One end of the first termination device is operatively connected to a first voltage regulator. Another end of the first termination is device operatively connected to a signal line of the IC. The second termination device resides on a die of the IC. One end of the second termination device is operatively connected to a second voltage regulator. Another end of the second termination device is operatively connected to the signal line of the IC. The current dump device provides a path to remove any current flow between the first voltage regulator and the second voltage regulator.
A system comprising:
An IC package comprising:
A computer system having a motherboard which has attached at least one IC, the at least one IC receiving power from a first voltage regulator and a second voltage regulator, the at least one IC comprising:
A method for allowing a first IC that has electrical signal termination on the die of the first IC to be substituted for a second IC that does not have electrical signal termination on the die of the second IC, the second IC currently connected in an electrical circuit designed for the second IC, said method comprising:
Dependencies are inferred from the claim text.