Chopper type voltage comparison circuit

Abstract

A chopper type voltage comparison circuit is disclosed which restrain leakage current between an input and output nodes of each amplifying circuit to enable normal voltage comparisons even if a threshold voltage for each transistor is reduced to diminish a power supply voltage. This chopper type voltage comparison circuit comprises a capacitor C1 having an input voltage or a reference voltage selectively supplied to one end thereof depending on whether a voltage input operation or a voltage comparison operation is to be performed, a CMOS clocked inverter circuit CINV1 for voltage amplification having a voltage at the other end of the capacitor input to an input node thereof and having a clock gate section biased so as to be constantly conductive, and a CMOS clocked inverter circuit CINV4 for input voltage setting having the same circuit configuration as the CMOS clocked inverter circuit for voltage amplification, having an input and output nodes short-circuited thereto, and connected to the input node of the CMOS clocked inverter circuit for voltage amplification so that the clock gate section is switch-controlled to be turned on for the voltage input operation, while the clock gate section is switch-controlled to be turned off for the voltage comparison operation.

Dependencies are inferred from the claim text.