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US 6,271,685 B1Granted
Semiconductor integrated circuit
AssigneeSharp Kabushiki Kaisha
InventorsKazuhiro Nagasawa, Kazuya Fujimoto, Shigeki Imai
Life of this patent
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Abstract
A semiconductor integrated circuit includes a pass transistor logic circuit and an output buffer. The output buffer compensates for an output level of the pass transistor logic circuit. Preferably, the output buffer includes a bootstrap circuit with a capacitor. The capacitor is preferably connected between a gate of an output transistor and an output terminal. Such an arrangement allows for the obtaining of a high voltage at the output terminal.
Claims12
A semiconductor integrated circuit, comprising:
- a pass transistor logic circuit;
- and
- an output buffer for compensating for an output level of the pass transistor logic circuit,
- wherein the output buffer includes a bootstrap circuit, and a DC path from a first power source voltage supply via a first transistor and a second transistor to a ground,
- wherein a capacitor in the bootstrap circuit is connected between a gate of the first transistor and an output terminal,
- the first transistor has a relatively small channel width and a relatively large channel length in comparison to the second transistor,
- a first output of the pass transistor logic circuit is applied to a gate of the second transistor,
- the pass transistor logic circuit, the output buffer including the bootstrap circuit, the first and the second transistors are respectively constituted by NMOS transistors,
- the output buffer additionally includes a driving force complementary transistor disposed between a second power source voltage and the output terminal, and
- a second output of the pass transistor logic circuit complementary to the first output is supplied to a gate of the driving force complementary transistor.
7 more elements
A semiconductor integrated circuit, comprising:
- a pass transistor logic circuit;
- and
- an output buffer for compensating for an output level of the pass transistor logic circuit,
- wherein the output buffer includes a bootstrap circuit which comprises a capacitor connected between a gate of a first transistor and an output terminal and a separation transistor,
- the gate of the first transistor is electrically coupled with the separation transistor and the capacitor,
- a gate of the separation transistor is connected to a first power source voltage supply,
- the output buffer further includes a DC path from a second power source voltage supply via the first transistor and a second transistor to a ground, and a driving force complementary transistor disposed between a third power source voltage supply and the output terminal, and
- a first output of the pass transistor logic circuit is applied to a gate of the second transistor and a second output of the pass transistor logic circuit complementary to the first output is supplied to a gate of the driving force complementary transistor.
5 more elements
Dependencies are inferred from the claim text.