Graded layer for use in semiconductor circuits and method for making same
AssigneeMicron Technology, Inc.
InventorsSalman Akram, Scott G. Meikle
Life of this patent
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Abstract
Methods of forming a graded layer is disclosed. The graded layer transitions from one material to another material. The properties of these materials are chosen to optimize the interfaces on each side of the graded layer. Specifically, an improved transistor gate stack barrier layer may be formed by disposing an appropriate graded layer between a gate layer and an interconnect layer. In fact, the graded layer may obviate the use of the interconnect layer, as the top of the graded layer may include a highly conductive material. An improved integrated circuit interconnect structure may also be formed by grading the material composition of an interconnect layer.
Claims29
A transistor gate stack, comprising:
- a dielectric layer disposed on a substrate;
- a gate layer disposed on said dielectric layer;
- and
- a graded layer disposed on said gate layer, said graded layer comprising a plurality of sublayers, wherein each of the plurality of sublayers is graded and comprised of a first region of a first material and a second region of a second material.
A layer for use in fabricating a microelectronic device, comprising:
- a graded layer comprising a plurality of sublayers, wherein each of the plurality of sublayers is graded and comprised of a first region of a first material and a second region of a second material.
Dependencies are inferred from the claim text.