US 6,271,565 B1Granted

Asymmetrical field effect transistor

AssigneeInternational Business Machines Corporation

InventorsTerence B. Hook, Dennis Hoyniak, Edward J. Nowak

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Abstract

A method of producing an asymmetrical semiconductor device with ion implantation techniques and semiconductor devices constructed according to this method in which a barrier of ion absorbing material of height h is positioned beside a structure on a semiconductor surface. The barrier is located at a maximum distance d from one side of the structure, and an angled ion implant is directed at the side of the structure. The maximum distance d of the barrier from the side of the structure is equal to the height of the barrier h divided by the tangent of the angle of the ion implant so that the side of the structure is shadowed from the ion implant. A second ion implant is directed to the opposite side of the structure on the semiconductor surface, thereby forming a desired implant and producing the asymmetrical semiconductor device.

Claims11

Dependent claims

An asymmetrical field effect transistor produced according to a method comprising the steps of:

providing a semiconductor surface having a structure created on the semiconductor surface, the structure having a first side and a second side;
forming a barrier of height h extending upward from the semiconductor surface at a location between the second side of the structure and a maximum distance d from the first side of the structure, the step of forming a barrier being performed after the structure is created on the semiconductor surface;
performing a first side ion implant at an angle of between zero and ninety degrees relative to the semiconductor surface and directed at the first side of the structure, the maximum distance d being equal to the height of the barrier h divided by the tangent of the angle of the first side ion implant;
and
performing a second side ion implant at an angle of between zero and ninety degrees relative to the semiconductor surface and directed at the second side of the structure.

2 more elements

Dependencies are inferred from the claim text.

Facts

Application: 09/516,544Filed 1 Mar 2000 · division
Priority: 10 Jul 1997
Granted: 7 Aug 2001
Term ends: Not estimatedThe source records don’t support an estimate.

Classification8 codes

H10D 30/0221
Of FETs having insulated gates [IGFET]: having asymmetry in the channel direction, e.g. lateral high-voltage MISFETs having drain offset region or…
H10D 30/603
Having lightly-doped drain or source extensions, e.g. LDD IGFETs or DDD IGFETs: having asymmetry in the channel direction, e.g. lateral…
H10D 62/371
Of igfets: inactive supplementary semiconductor regions, e.g. for preventing punch-through, improving capacity effect or leakage current
H10P 30/221
Using masks: characterised by the angle between the ion beam and the mask