Borderless wordline for DRAM cell

Abstract

A semiconductor structure and method of making the same are disclosed which includes a DRAM cell which has a transistor which includes a gate. The gate includes an individual segment of gate conductor such as polysilicon on a thin dielectric material. The transistor further has a single crystal semiconductor substrate having a source/drain region. An active conducting wordline is deposited on top of and electrically contacting a segment gate conductor, the wordline being a conductive material having a top and sidewalls. Electrically insulating material completely surrounds the active wordline except where the active wordline contacts the segment gate conductor. The insulating material surrounding the active wordline includes silicon nitride overlying the top and surrounding a portion of the sidewalls thereof, and silicon dioxide surrounds the remainder of the side walls of the active wordline. A bitline contact contacts the source/drain region and the insulating material surrounding the active wordline to thereby make the bitline contact borderless to the wordline. A fully encased passing wordline is also provided which is spaced from and insulated from the segment gate conductor and the active wordline.

Dependencies are inferred from the claim text.