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US 6,271,102 B1Granted
Method and system for dicing wafers, and semiconductor structures incorporating the products thereof
AssigneeInternational Business Machines Corporation
InventorsDonald W. Brouillette, Robert F. Cook, Thomas G. Ference, Wayne J. Howell, Eric G. Liniger, Ronald L. Mendelson
Life of this patent
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Abstract
A method and system for dicing a semiconductor wafer providing a structure with greatly reduced backside chipping and cracking, as well as increased die strength. Semiconductor chip structures obtained from wafers diced according to this invention are also encompassed.
Claims11
A method of processing a semiconductor structure, comprising the steps, in sequence, of
- a.) cutting a plurality of edges extending from a back planar surface partially through the thickness of said semiconductor structure, and
- b.) cutting grooves in a front planar surface opposite to said back planar surface in registry with said edges effective to dice said structure into a plurality of die units, wherein said cutting in step a.) forms a chamfer.
A method of dicing semiconductors, comprising the steps, in sequence, of:
- a) providing a wafer having a front major side and an opposite back major side, said wafer having a thickness dimension extending normally between said front and back major sides;
- b) partially cutting through said wafer in said thickness dimension from said back major side to provide a bevelled trench in said wafer;
- and
- c) cutting through said wafer from said front major side in registry with said trench and subdivide said wafer.
1 more element
Dependencies are inferred from the claim text.