Semiconductor device, and method for manufacturing the same
AssigneeMitsubishi Denki Kabushiki Kaisha
InventorsKeiichi Yamada, Hiroshi Kawashima, Keiichi Higashitani
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AssigneeMitsubishi Denki Kabushiki Kaisha
InventorsKeiichi Yamada, Hiroshi Kawashima, Keiichi Higashitani
Estimating the term…
There is described a semiconductor device which includes in a single chip a high withstanding voltage transistor and a low withstanding voltage transistor and which imparts each of the transistors with a relevant threshold voltage and a characteristic suitable for retarding hot carriers. Specifically, an impurity profile is imparted to a lightly-doped extension (LDDEX) region formed across a channel region of a low withstanding voltage NMOS transistor, and a different impurity profile is imparted to an LDDEX region formed across a channel region of a high withstanding voltage NMOS transistor. These impurity profiles bring the threshold voltages of the MOS transistors to individual relevant voltages and retard hot carriers in the individual MOS transistors.
A semiconductor device containing in a single chip a low withstanding voltage MOS transistor and a high withstanding voltage MOS transistor, wherein:
Dependencies are inferred from the claim text.