Turbo code termination

In an arrangement comprising a first redundancy encoder for encoding a stream of input bits to generate a first sequence of M expanded groups of first redundancy encoder output bits, a second redundancy encoder having as input N bit groups in a second sequence, said second sequence including said M expanded groups of first redundancy encoder output bits, and said second redundancy encoder encoding at least ones of the bits of each of said N bit groups to generate an expanded group of second redundancy encoder output bits, the method comprising the steps of:

• providing at least one predefined bit group as at least one of said N bit groups and wherein N>M, whereby said second redundancy encoder can be brought to a known state while having processed all of said M groups of first redundancy encoder output bits.

A method for use in an arrangement which comprises a first redundancy encoder operative for encoding input bits to generate a sequence of expanded groups of first redundancy encoder output bits, a second redundancy encoder receiving as input at least a portion of each of said expanded groups of first redundancy encoder output bits and for encoding said portions of each of said first redundancy encoder output bits to generate expanded groups of second redundancy encoder output bits, the method comprising the steps of:

• preventing the generation of at least a portion of at least one of said sequence of expanded groups of first redundancy encoder output bits;
• and
• substituting as input of said second redundancy encoder at least one predefined bit for said at least a portion of at least one of said sequence of expanded groups of first redundancy encoder output bits whose generation was prevented.

In an arrangement for generating data symbols during successive symbol intervals, said arrangement comprising a first finite state machine redundancy encoder for encoding a group of input bits associated with a particular symbol interval to generate an expanded group of first redundancy encoder output bits associated with said particular symbol interval, and a second finite state machine redundancy encoder for encoding a predetermined number of said first redundancy encoder output bits using a second redundancy code to generate an expanded group of second redundancy encoder output bits associated with said particular symbol interval, and a mapper adapted to select a particular data symbol from a signal constellation for said particular symbol interval as a function of at least said expanded group of second redundancy encoder output bits, a method comprising the steps of:

• terminating said second redundancy code for at least one symbol interval;
• and
• not advancing the state of said first redundancy encoder for said at least one symbol interval for which said second redundancy code is terminated.

In an arrangement for generating data symbols during successive symbol intervals, said arrangement comprising a first redundancy encoder for encoding a group of input bits associated with a particular symbol interval to generate an expanded group of first redundancy encoder output bits associated with said particular symbol interval, and a second redundancy encoder for encoding a predetermined number of said first redundancy encoder output bits using a second redundancy code to generate an expanded group of second redundancy encoder output bits associated with said particular symbol interval, and a mapper adapted to select a particular data symbol from a signal constellation for said particular symbol interval as a function of at least said expanded group of second redundancy encoder output bits, a method comprising the steps of:

• terminating said first redundancy code for at least one symbol interval;
• and
• terminating said second redundancy code for at least one symbol interval other than the at least one symbol interval for which said first redundancy code is terminated.